2008-12-06 23:29:01 +00:00
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/*
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2009-02-24 10:13:40 +00:00
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* (C) Copyright 2009
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2008-12-06 23:29:01 +00:00
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* Graeme Russ, graeme.russ@gmail.com
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*
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2009-02-24 10:13:40 +00:00
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* (C) Copyright 2002
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2011-08-04 16:45:45 +00:00
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* Daniel Engström, Omicron Ceti AB, daniel@omicron.se
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2009-02-24 10:13:40 +00:00
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2008-12-06 23:29:01 +00:00
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*/
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#ifndef __ASM_INTERRUPT_H_
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#define __ASM_INTERRUPT_H_ 1
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2010-10-07 09:03:23 +00:00
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#include <asm/types.h>
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2015-07-10 02:38:32 +00:00
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/* Architecture defined exceptions */
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enum x86_exception {
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EXC_DE = 0,
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EXC_DB,
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EXC_NMI,
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EXC_BP,
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EXC_OF,
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EXC_BR,
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EXC_UD,
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EXC_NM,
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EXC_DF,
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EXC_CSO,
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EXC_TS,
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EXC_NP,
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EXC_SS,
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EXC_GP,
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EXC_PF,
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EXC_MF = 16,
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EXC_AC,
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EXC_MC,
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EXC_XM,
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EXC_VE
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};
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2011-04-13 09:43:28 +00:00
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/* arch/x86/cpu/interrupts.c */
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2009-02-24 10:13:40 +00:00
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void set_vector(u8 intnum, void *routine);
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/* Architecture specific functions */
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void mask_irq(int irq);
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void unmask_irq(int irq);
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void specific_eoi(int irq);
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extern char exception_stack[];
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2014-11-15 01:18:31 +00:00
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/**
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* configure_irq_trigger() - Configure IRQ triggering
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*
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* Switch the given interrupt to be level / edge triggered
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*
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* @param int_num legacy interrupt number (3-7, 9-15)
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* @param is_level_triggered true for level triggered interrupt, false for
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* edge triggered interrupt
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*/
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void configure_irq_trigger(int int_num, bool is_level_triggered);
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2015-04-29 02:25:16 +00:00
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void *x86_get_idt(void);
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2008-12-06 23:29:01 +00:00
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#endif
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