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u-boot/configs/xilinx_zynqmp_r5_defconfig

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arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-12 15:39:46 +00:00
CONFIG_ARM=y
CONFIG_ARCH_ZYNQMP_R5=y
CONFIG_SYS_TEXT_BASE=0x10000000
env: Finish migration of common ENV options - In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-19 01:02:10 +00:00
CONFIG_ENV_SIZE=0x20000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 19:54:04 +00:00
CONFIG_NR_DRAM_BANKS=1
xilinx: Sync symbols location in defconfigs CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's why this sync. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-06-04 06:33:30 +00:00
CONFIG_DEBUG_UART_BASE=0xff010000
CONFIG_DEBUG_UART_CLOCK=100000000
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-12 15:39:46 +00:00
CONFIG_DEBUG_UART=y
timer: cadence: Implement timer_get_boot_us This function is required for adding bootstage support. Also enable it directly for ZynqMP R5 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-18 12:03:56 +00:00
CONFIG_BOOTSTAGE=y
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-12 15:39:46 +00:00
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="ZynqMP r5> "
# CONFIG_CMD_SETEXPR is not set
timer: cadence: Implement timer_get_boot_us This function is required for adding bootstage support. Also enable it directly for ZynqMP R5 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-18 12:03:56 +00:00
CONFIG_CMD_BOOTSTAGE=y
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-12 15:39:46 +00:00
CONFIG_OF_EMBED=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 19:26:12 +00:00
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5"
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
arm: zynqmp: Add ZynqMP minimal R5 support Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot. This patch is adding minimal support to get U-Boot boot. U-Boot on R5 runs out of DDR with default configuration that's why DDR needs to be partitioned if there is something else running on arm64. Console is done via Cadence uart driver and the first Cadence Triple Timer Counter is used for time. This configuration with uart1 was tested on zcu100-revC. U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200) Model: Xilinx ZynqMP R5 DRAM: 512 MiB WARNING: Caches not enabled MMC: In: serial@ff010000 Out: serial@ff010000 Err: serial@ff010000 Net: Net Initialization Skipped No ethernet found. ZynqMP r5> There are two ways how to run this on ZynqMP. 1. Run from ZynqMP arm64 tftpb 20000000 u-boot-r5.elf setenv autostart no && bootelf -p 20000000 cpu 4 disable && cpu 4 release 10000000 lockstep or cpu 4 disable && cpu 4 release 10000000 split 2. Load via jtag when directly to R5 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-04-12 15:39:46 +00:00
CONFIG_DEBUG_UART_ZYNQ=y
CONFIG_ZYNQ_SERIAL=y
CONFIG_TIMER=y
CONFIG_CADENCE_TTC_TIMER=y
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