2006-04-21 16:30:47 +00:00
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/*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2006-04-21 16:30:47 +00:00
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*/
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#define SDRAM_DDR 0 /* is SDR */
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/* Settings for XLB = 132 MHz */
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#define SDRAM_MODE 0x00CD0000
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/* #define SDRAM_MODE 0x008D0000 */ /* CAS latency 2 */
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#define SDRAM_CONTROL 0x504F0000
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#define SDRAM_CONFIG1 0xD2322800
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/* #define SDRAM_CONFIG1 0xD2222800 */ /* CAS latency 2 */
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/*#define SDRAM_CONFIG1 0xD7322800 */ /* SDRAM controller bug workaround */
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#define SDRAM_CONFIG2 0x8AD70000
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/*#define SDRAM_CONFIG2 0xDDD70000 */ /* SDRAM controller bug workaround */
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