u-boot/include/configs/am3517_evm.h

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* am3517_evm.h - Default configuration for AM3517 EVM board.
*
* Author: Vaibhav Hiremath <hvaibhav@ti.com>
*
* Based on omap3_evm_config.h
*
* Copyright (C) 2010 Texas Instruments Incorporated
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <configs/ti_omap3_common.h>
/* Board NAND Info. */
#ifdef CONFIG_MTD_RAW_NAND
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
11, 12, 13, 14, 16, 17, 18, 19, 20, \
21, 22, 23, 24, 25, 26, 27, 28, 30, \
31, 32, 33, 34, 35, 36, 37, 38, 39, \
40, 41, 42, 44, 45, 46, 47, 48, 49, \
50, 51, 52, 53, 54, 55, 56 }
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 13
#define CONFIG_SYS_NAND_MAX_OOBFREE 2
#define CONFIG_SYS_NAND_MAX_ECCPOS 56
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
/* NAND block size is 128 KiB. Synchronize these values with
* corresponding Device Tree entries in Linux:
* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
* U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
* U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
* Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
* DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
* RootFS Remaining Flash Space @ 0xB20000
*/
#endif /* CONFIG_MTD_RAW_NAND */
/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x82000000\0" \
"console=ttyS2,115200n8\0" \
"fdtfile=am3517-evm.dtb\0" \
"fdtaddr=0x82C00000\0" \
"vram=16M\0" \
"bootenv=uEnv.txt\0" \
"cmdline=\0" \
"optargs=\0" \
"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rw\0" \
"mmcrootfstype=ext4 rootwait fixrtc\0" \
"mmcargs=setenv bootargs console=${console} " \
"${mtdparts} " \
"${optargs} " \
"root=${mmcroot} " \
"rootfstype=${mmcrootfstype} " \
"${cmdline}\0" \
"nandargs=setenv bootargs console=${console} " \
"${mtdparts} " \
"${optargs} " \
"root=ubi0:rootfs rw ubi.mtd=rootfs " \
"rootfstype=ubifs rootwait " \
"${cmdline}\0" \
"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
"importbootenv=echo Importing environment from mmc ...; " \
"env import -t ${loadaddr} ${filesize}\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source ${loadaddr}\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${loadaddr} 2a0000 800000; " \
"nand read ${fdtaddr} aa0000 80000; " \
"bootm ${loadaddr} - ${fdtaddr}\0" \
/* Miscellaneous configurable options */
/* memtest works on */
/* Physical Memory Map */
#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
/* FLASH and environment organization */
/* **** PISMO SUPPORT *** */
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
/* on one chip */
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#if defined(CONFIG_MTD_RAW_NAND)
ARM: omap: clean redundant PISMO_xx macros used in OMAP3 PISMO_xx macros were used to define 'Platform Independent Storage MOdule' related GPMC configurations. This patch - Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided by current u-boot infrastructure. - Removes unused redundant macros, which are no longer required after merging of common platform code in following commit commit a0a37183bd75e74608bc78c8d0e2a34454f95a91 ARM: omap: merge GPMC initialization code for all platform +-----------------+-----------------------------------------------------------+ | Macro | Reason for removal | +-----------------+-----------------------------------------------------------+ | PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE | +-----------------+-----------------------------------------------------------+ | PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so | | | configuring GPMC chip-select for smallest allowable | | | segment (GPMC_SIZE_16M) is enough. | +-----------------+-----------------------------------------------------------+ | PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of | | | 128MB (GPMC_SIZE_128M) | +-----------------+-----------------------------------------------------------+ +-----------------+-----------------------------------------------------------+ | PISMO1_NOR | Unused Macros | | PISMO1_NAND | | | PISMO2_CS0 | | | PISMO2_CS1 | | | PISMO1_ONENAND | | | PISMO2_NAND_CS0 | | | PISMO2_NAND_CS1 | | | PISMO1_NOR_BASE | | | PISMO1_NAND_BASE| | | PISMO2_CS0_BASE | | +-----------------+-----------------------------------------------------------+ Signed-off-by: Pekon Gupta <pekon@ti.com>
2014-07-18 12:29:41 +00:00
#define CONFIG_SYS_FLASH_BASE NAND_BASE
#endif
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#endif /* __CONFIG_H */