mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 02:38:56 +00:00
285 lines
8.5 KiB
C
285 lines
8.5 KiB
C
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/*
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* Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __CONFIG_IGEP0033_H
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#define __CONFIG_IGEP0033_H
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#define CONFIG_AM33XX
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#include <asm/arch/omap.h>
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/* Mach type */
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#define MACH_TYPE_IGEP0033 4521 /* Until the next sync */
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#define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
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/* Clock defines */
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#define V_OSCK 24000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK)
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/* DMA defines */
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#define CONFIG_DMA_COHERENT
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#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT "U-Boot# "
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#define CONFIG_SYS_NO_FLASH
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/* Display cpuinfo */
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#define CONFIG_DISPLAY_CPUINFO
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/* Commands to include */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_ECHO
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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/*
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* Because the issues explained in doc/README.memory-test, the "mtest command
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* is considered deprecated. It should not be enabled in most normal ports of
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* U-Boot.
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*/
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#undef CONFIG_CMD_MEMTEST
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#define CONFIG_BOOTDELAY 1 /* negative for no autoboot */
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x80200000\0" \
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"rdaddr=0x81000000\0" \
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"bootfile=/boot/uImage\0" \
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"console=ttyO0,115200n8\0" \
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"optargs=\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
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"ramrootfstype=ext2\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t $loadaddr $filesize\0" \
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"ramargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${ramroot} " \
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"rootfstype=${ramrootfstype}\0" \
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"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
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"loaduimagefat=load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
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"loaduimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootm ${loadaddr}\0" \
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"ramboot=echo Booting from ramdisk ...; " \
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"run ramargs; " \
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"bootm ${loadaddr}\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loaduimage; then " \
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"run mmcboot;" \
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"fi;" \
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"fi;" \
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/* Max number of command args */
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#define CONFIG_SYS_MAXARGS 16
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/* Console I/O Buffer Size */
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#define CONFIG_SYS_CBSIZE 512
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+ sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
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#define CONFIG_SYS_HZ 1000 /* 1ms clock */
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
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#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
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#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
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#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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GENERATED_GBL_DATA_SIZE)
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/* Platform/Board specific defs */
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#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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#define CONFIG_SYS_HZ 1000
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/* NS16550 Configuration */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK (48000000)
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#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
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#define CONFIG_SERIAL_MULTI
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_ENV_OVERWRITE 1
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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/* MMC support */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_DOS_PARTITION
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/* GPIO support */
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#define CONFIG_OMAP_GPIO
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/* Ethernet support */
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#define CONFIG_DRIVER_TI_CPSW
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_SUBNETMASK
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ADDR 0
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#define CONFIG_PHY_SMSC
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/* NAND support */
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#define CONFIG_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
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#define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION 1
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_RBTREE
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#define CONFIG_LZO
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#define MTDIDS_DEFAULT "nand0=nand"
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#define MTDPARTS_DEFAULT "mtdparts=nand:512k(SPL),"\
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"1m(U-Boot),128k(U-Boot Env),"\
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"5m(Kernel),-(File System)"
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/* Unsupported features */
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#undef CONFIG_USE_IRQ
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/* Defines for SPL */
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (101 * 1024)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
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#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_GPIO_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_NAND_AM33XX_BCH
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_PAGE_SIZE 2048
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
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10, 11, 12, 13, 14, 15, 16, 17, \
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18, 19, 20, 21, 22, 23, 24, 25, \
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26, 27, 28, 29, 30, 31, 32, 33, \
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34, 35, 36, 37, 38, 39, 40, 41, \
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42, 43, 44, 45, 46, 47, 48, 49, \
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50, 51, 52, 53, 54, 55, 56, 57, }
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 14
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#define CONFIG_SYS_NAND_ECCSTEPS 4
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
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CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80800000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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/*
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* Since SPL did pll and ddr initialization for us,
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* we don't need to do it twice.
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*/
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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#endif /* ! __CONFIG_IGEP0033_H */
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