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u-boot/arch/arm/dts/zynq-cse-qspi.dtsi

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
// SPDX-License-Identifier: GPL-2.0+
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
/*
* Xilinx CSE QSPI board DTS
*
* Copyright (C) 2015 - 2017 Xilinx, Inc.
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Zynq CSE QSPI Board";
compatible = "xlnx,zynq-cse-qspi", "xlnx,zynq-7000";
aliases {
spi0 = &qspi;
serial0 = &dcc;
};
memory@fffc0000 {
device_type = "memory";
reg = <0xFFFC0000 0x40000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
dcc: dcc {
compatible = "arm,dcc";
status = "disabled";
u-boot,dm-pre-reloc;
};
amba: amba {
u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
ranges;
intc: interrupt-controller@f8f01000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xF8F01000 0x1000>,
<0xF8F00100 0x100>;
};
qspi: spi@e000d000 {
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
compatible = "xlnx,zynq-qspi-1.0";
status = "okay";
interrupt-parent = <&intc>;
interrupts = <0 19 4>;
reg = <0xe000d000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
num-cs = <1>;
arm: zynq: cse_qspi: Fix overwriting spi-rx-bus-width property spi-rx-bus-width property is part of flash, so it should be moved to flash node from qspi node. This patch fixes the incorrect read of spi-rx-bus-width property by moving it to flash node. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-09-11 09:39:56 +00:00
flash0: flash@0 {
xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP) Add missing "jedec, spi-nor" compatible string for QSPI flash node. Spi-nor framework uses this compatibility string to probe & initialize flash. With missing compatibility string we are observing below error: Zynq> sf probe 0 0 0 jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes: 00, 00, 00 Failed to initialize SPI flash at 0:0 (error -2) Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-01 08:45:11 +00:00
compatible = "n25q128a11", "jedec,spi-nor";
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
ARM: zynq: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-19 09:57:34 +00:00
partition@0 {
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
ARM: zynq: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-19 09:57:34 +00:00
partition@100000 {
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
ARM: zynq: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-19 09:57:34 +00:00
partition@600000 {
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
ARM: zynq: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-19 09:57:34 +00:00
partition@620000 {
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
ARM: zynq: Fix addresses in partition definitions Node name should be <name>@<address> which is not how partitions are described. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-02-19 09:57:34 +00:00
partition@c00000 {
arm: zynq: Add mini u-boot configuration for zynq Add configuration files/dtses for mini u-boot configurations which runs out of OCM. ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000 was hardcoded. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-02 09:54:48 +00:00
label = "qspi-bitstream";
reg = <0xC00000 0x400000>;
};
};
};
slcr: slcr@f8000000 {
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
reg = <0xF8000000 0x1000>;
ranges;
clkc: clkc@100 {
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
fclk-enable = <0xf>;
u-boot,dm-pre-reloc;
clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
"dci", "lqspi", "smc", "pcap", "gem0", "gem1",
"fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
"dma", "usb0_aper", "usb1_aper", "gem0_aper",
"gem1_aper", "sdio0_aper", "sdio1_aper",
"spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
"i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
"gpio_aper", "lqspi_aper", "smc_aper", "swdt",
"dbg_trc", "dbg_apb";
reg = <0x100 0x100>;
};
};
};
};
&dcc {
status = "okay";
};
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