2011-04-19 10:42:40 +00:00
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/*
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* Copyright (C) ST-Ericsson SA 2009
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2011-04-19 10:42:40 +00:00
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*/
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#ifndef __U8500_H
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#define __U8500_H
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/*
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* base register values for U8500
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*/
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#define CFG_PRCMU_BASE 0x80157000 /* Power, reset and clock
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Management Unit */
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#define CFG_SDRAMC_BASE 0x903CF000 /* SDRAMC cnf registers */
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#define CFG_FSMC_BASE 0x80000000 /* FSMC Controller */
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/*
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* U8500 GPIO register base for 9 banks
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*/
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#define U8500_GPIO_0_BASE 0x8012E000
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#define U8500_GPIO_1_BASE 0x8012E080
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#define U8500_GPIO_2_BASE 0x8000E000
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#define U8500_GPIO_3_BASE 0x8000E080
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#define U8500_GPIO_4_BASE 0x8000E100
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#define U8500_GPIO_5_BASE 0x8000E180
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#define U8500_GPIO_6_BASE 0x8011E000
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#define U8500_GPIO_7_BASE 0x8011E080
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#define U8500_GPIO_8_BASE 0xA03FE000
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#endif /* __U8500_H */
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