2011-11-08 23:18:08 +00:00
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/*
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2012-08-13 09:53:12 +00:00
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* Freescale i.MX233/i.MX28 specific functions
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2011-11-08 23:18:08 +00:00
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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2012-08-13 09:53:12 +00:00
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#ifndef __SYS_PROTO_H__
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#define __SYS_PROTO_H__
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2011-11-08 23:18:08 +00:00
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2012-08-13 09:53:12 +00:00
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int mxs_reset_block(struct mxs_register_32 *reg);
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int mxs_wait_mask_set(struct mxs_register_32 *reg,
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2012-02-26 12:15:05 +00:00
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uint32_t mask,
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int timeout);
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2012-08-13 09:53:12 +00:00
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int mxs_wait_mask_clr(struct mxs_register_32 *reg,
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2012-02-26 12:15:05 +00:00
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uint32_t mask,
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int timeout);
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2011-11-08 23:18:08 +00:00
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2011-11-08 23:18:09 +00:00
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int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
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2011-12-02 03:47:40 +00:00
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#ifdef CONFIG_SPL_BUILD
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#include <asm/arch/iomux-mx28.h>
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2012-08-05 09:05:32 +00:00
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void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
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2011-12-02 03:47:40 +00:00
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const unsigned int iomux_size);
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#endif
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2012-08-13 09:53:12 +00:00
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struct mxs_pair {
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2012-05-01 11:09:45 +00:00
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uint8_t boot_pads;
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uint8_t boot_mask;
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const char *mode;
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};
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2012-08-13 09:53:12 +00:00
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static const struct mxs_pair mxs_boot_modes[] = {
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2012-05-01 11:09:45 +00:00
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{ 0x00, 0x0f, "USB #0" },
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{ 0x01, 0x1f, "I2C #0, master, 3V3" },
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{ 0x11, 0x1f, "I2C #0, master, 1V8" },
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{ 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" },
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{ 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" },
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{ 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" },
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{ 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" },
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{ 0x04, 0x1f, "NAND, 3V3" },
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{ 0x14, 0x1f, "NAND, 1V8" },
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{ 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" },
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{ 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" },
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{ 0x09, 0x1f, "SSP SD/MMC #0, 3V3" },
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{ 0x19, 0x1f, "SSP SD/MMC #0, 1V8" },
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{ 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" },
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{ 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" },
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{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
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};
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2012-08-05 09:05:32 +00:00
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struct mxs_spl_data {
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2012-05-01 11:09:45 +00:00
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uint8_t boot_mode_idx;
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2012-05-01 11:09:44 +00:00
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uint32_t mem_dram_size;
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};
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2012-08-18 13:28:12 +00:00
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int mx28_dram_init(void);
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2011-12-20 05:46:33 +00:00
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2012-08-13 09:53:12 +00:00
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#endif /* __SYS_PROTO_H__ */
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