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u-boot/configs/firefly-rk3288_defconfig

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rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
CONFIG_TARGET_FIREFLY_RK3288=y
common: add CMD_GPIO to Kconfig Add CMD_GPIO to Kconfig and run tools/moveconfig.py . Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-11 13:39:33 +00:00
CONFIG_SPL_STACK_R_ADDR=0x80000
rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly"
CONFIG_SPL_STACK_R=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
Reorder defconfigs with 'savedefconfig' Some boards' defconfigs are disordered. Reorder them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 12:14:15 +00:00
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
CONFIG_LED=y
CONFIG_LED_GPIO=y
Reorder defconfigs with 'savedefconfig' Some boards' defconfigs are disordered. Reorder them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 12:14:15 +00:00
CONFIG_RESET=y
CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y
rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_FULL is not set
Reorder defconfigs with 'savedefconfig' Some boards' defconfigs are disordered. Reorder them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 12:14:15 +00:00
CONFIG_SPL_PINCTRL=y
rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
CONFIG_DM_REGULATOR=y
CONFIG_REGULATOR_ACT8846=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
Reorder defconfigs with 'savedefconfig' Some boards' defconfigs are disordered. Reorder them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-09-28 12:14:15 +00:00
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_BASE=0xff690000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
ns16550: move CONFIG_SYS_NS16550 to Kconfig Move CONFIG_SYS_NS16550 to Kconfig, and run moveconfig.py. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
2015-11-19 13:48:14 +00:00
CONFIG_SYS_NS16550=y
rockchip: Add basic support for firefly-rk3288 The Firefly RK3288 is a suitable target board for initial mainline Rockchip support. It includes a good set of peripherals, a recent SoC and it is readily available. This adds only some basic files required to allow the baord to display a serial message in SPL and hang. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-30 22:55:41 +00:00
CONFIG_USE_PRIVATE_LIBGCC=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
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