2022-09-09 11:59:11 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 MediaTek Inc.
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* Author: Sam Shih <sam.shih@mediatek.com>
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*/
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#include <init.h>
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#include <asm/armv8/mmu.h>
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#include <asm/system.h>
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#include <asm/global_data.h>
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2022-10-29 00:27:08 +00:00
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#include <linux/sizes.h>
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2022-09-09 11:59:11 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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2022-11-16 18:10:37 +00:00
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gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
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2022-09-09 11:59:11 +00:00
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return 0;
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}
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void reset_cpu(ulong addr)
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{
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psci_system_reset();
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}
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static struct mm_region mt7981_mem_map[] = {
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{
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/* DDR */
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.virt = 0x40000000UL,
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.phys = 0x40000000UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
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}, {
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.virt = 0x00000000UL,
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.phys = 0x00000000UL,
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.size = 0x40000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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0,
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}
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};
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struct mm_region *mem_map = mt7981_mem_map;
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