2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2009-09-29 14:02:38 +00:00
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/*
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* Copyright (C) 2009 Texas Instruments Incorporated
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*/
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#ifndef _GPIO_DEFS_H_
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#define _GPIO_DEFS_H_
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2009-12-22 05:26:12 +00:00
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#ifndef CONFIG_SOC_DA8XX
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2009-09-29 14:02:38 +00:00
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#define DAVINCI_GPIO_BINTEN 0x01C67008
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#define DAVINCI_GPIO_BANK01 0x01C67010
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#define DAVINCI_GPIO_BANK23 0x01C67038
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#define DAVINCI_GPIO_BANK45 0x01C67060
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#define DAVINCI_GPIO_BANK67 0x01C67088
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2009-12-22 05:26:12 +00:00
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#else /* CONFIG_SOC_DA8XX */
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#define DAVINCI_GPIO_BINTEN 0x01E26008
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#define DAVINCI_GPIO_BANK01 0x01E26010
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#define DAVINCI_GPIO_BANK23 0x01E26038
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#define DAVINCI_GPIO_BANK45 0x01E26060
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#define DAVINCI_GPIO_BANK67 0x01E26088
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2011-09-14 19:59:35 +00:00
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#define DAVINCI_GPIO_BANK8 0x01E260B0
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2009-12-22 05:26:12 +00:00
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#endif /* CONFIG_SOC_DA8XX */
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2009-09-29 14:02:38 +00:00
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struct davinci_gpio {
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unsigned int dir;
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unsigned int out_data;
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unsigned int set_data;
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unsigned int clr_data;
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unsigned int in_data;
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unsigned int set_rising;
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unsigned int clr_rising;
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unsigned int set_falling;
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unsigned int clr_falling;
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unsigned int intstat;
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};
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struct davinci_gpio_bank {
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int num_gpio;
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unsigned int irq_num;
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unsigned int irq_mask;
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unsigned long *in_use;
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2018-06-11 03:25:57 +00:00
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struct davinci_gpio *base;
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2009-09-29 14:02:38 +00:00
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};
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2009-12-22 05:26:12 +00:00
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#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)
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#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23)
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#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45)
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#define davinci_gpio_bank67 ((struct davinci_gpio *)DAVINCI_GPIO_BANK67)
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2011-09-14 19:59:35 +00:00
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#define davinci_gpio_bank8 ((struct davinci_gpio *)DAVINCI_GPIO_BANK8)
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2009-12-22 05:26:12 +00:00
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2018-06-11 03:25:57 +00:00
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#ifndef CONFIG_DM_GPIO
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2011-07-18 13:26:01 +00:00
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#define gpio_status() gpio_info()
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2018-06-11 03:25:57 +00:00
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#endif
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2011-07-18 13:26:01 +00:00
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#define GPIO_NAME_SIZE 20
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2013-02-07 23:41:01 +00:00
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#if defined(CONFIG_SOC_DM644X)
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/* GPIO0 to GPIO53, omit the V3.3 volts one */
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#define MAX_NUM_GPIOS 70
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2013-03-11 16:02:40 +00:00
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#elif defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
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2013-02-01 06:46:00 +00:00
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#define MAX_NUM_GPIOS 128
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#else
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2011-07-18 13:26:01 +00:00
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#define MAX_NUM_GPIOS 144
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2013-02-01 06:46:00 +00:00
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#endif
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2011-07-18 13:26:01 +00:00
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#define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5))
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#define GPIO_BIT(gp) ((gp) & 0x1F)
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void gpio_info(void);
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2018-06-11 03:25:57 +00:00
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#ifdef CONFIG_DM_GPIO
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/* Information about a GPIO bank */
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struct davinci_gpio_platdata {
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int bank_index;
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ulong base; /* address of registers in physical memory */
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const char *port_name;
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};
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#endif
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2009-09-29 14:02:38 +00:00
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#endif
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