2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2016-05-02 02:28:15 +00:00
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/*
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* (C) Copyright 2016 Chen-Yu Tsai <wens@csie.org>
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*
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* X-Powers AXP809 Power Management IC driver
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*/
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#define AXP809_CHIP_ID 0x03
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#define AXP809_OUTPUT_CTRL1 0x10
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#define AXP809_OUTPUT_CTRL1_DC5LDO_EN (1 << 0)
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#define AXP809_OUTPUT_CTRL1_DCDC1_EN (1 << 1)
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#define AXP809_OUTPUT_CTRL1_DCDC2_EN (1 << 2)
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#define AXP809_OUTPUT_CTRL1_DCDC3_EN (1 << 3)
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#define AXP809_OUTPUT_CTRL1_DCDC4_EN (1 << 4)
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#define AXP809_OUTPUT_CTRL1_DCDC5_EN (1 << 5)
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#define AXP809_OUTPUT_CTRL1_ALDO1_EN (1 << 6)
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#define AXP809_OUTPUT_CTRL1_ALDO2_EN (1 << 7)
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#define AXP809_OUTPUT_CTRL2 0x12
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#define AXP809_OUTPUT_CTRL2_ELDO1_EN (1 << 0)
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#define AXP809_OUTPUT_CTRL2_ELDO2_EN (1 << 1)
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#define AXP809_OUTPUT_CTRL2_ELDO3_EN (1 << 2)
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#define AXP809_OUTPUT_CTRL2_DLDO1_EN (1 << 3)
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#define AXP809_OUTPUT_CTRL2_DLDO2_EN (1 << 4)
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#define AXP809_OUTPUT_CTRL2_ALDO3_EN (1 << 5)
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#define AXP809_OUTPUT_CTRL2_SWOUT_EN (1 << 6)
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#define AXP809_OUTPUT_CTRL2_DC1SW_EN (1 << 7)
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#define AXP809_DLDO1_CTRL 0x15
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#define AXP809_DLDO2_CTRL 0x16
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#define AXP809_ELDO1_CTRL 0x19
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#define AXP809_ELDO2_CTRL 0x1a
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#define AXP809_ELDO3_CTRL 0x1b
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#define AXP809_DC5LDO_CTRL 0x1c
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#define AXP809_DCDC1_CTRL 0x21
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#define AXP809_DCDC2_CTRL 0x22
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#define AXP809_DCDC3_CTRL 0x23
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#define AXP809_DCDC4_CTRL 0x24
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#define AXP809_DCDC5_CTRL 0x25
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#define AXP809_ALDO1_CTRL 0x28
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#define AXP809_ALDO2_CTRL 0x29
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#define AXP809_ALDO3_CTRL 0x2a
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#define AXP809_SHUTDOWN 0x32
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#define AXP809_SHUTDOWN_POWEROFF (1 << 7)
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/* For axp_gpio.c */
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2021-08-22 23:18:04 +00:00
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#ifdef CONFIG_AXP809_POWER
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2016-05-02 02:28:15 +00:00
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#define AXP_POWER_STATUS 0x00
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2022-01-21 13:37:31 +00:00
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#define AXP_POWER_STATUS_ALDO_IN BIT(0)
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2016-05-02 02:28:15 +00:00
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#define AXP_VBUS_IPSOUT 0x30
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#define AXP_VBUS_IPSOUT_DRIVEBUS (1 << 2)
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#define AXP_MISC_CTRL 0x8f
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#define AXP_MISC_CTRL_N_VBUSEN_FUNC (1 << 4)
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#define AXP_GPIO0_CTRL 0x90
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#define AXP_GPIO1_CTRL 0x92
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#define AXP_GPIO_CTRL_OUTPUT_LOW 0x00 /* Drive pin low */
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#define AXP_GPIO_CTRL_OUTPUT_HIGH 0x01 /* Drive pin high */
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#define AXP_GPIO_CTRL_INPUT 0x02 /* Input */
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#define AXP_GPIO_STATE 0x94
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#define AXP_GPIO_STATE_OFFSET 0
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2021-08-22 23:18:04 +00:00
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#endif
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