u-boot/arch/arm/mach-uniphier/clk/pll.h

/*
 * Copyright (C) 2016 Socionext Inc.
 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef MACH_PLL_H
#define MACH_PLL_H

#define UNIPHIER_PLL_FREQ_DEFAULT	(0)

void uniphier_ld4_dpll_ssc_en(void);

int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
			      unsigned int ssc_rate, unsigned int divn);
int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);
int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi);
int uniphier_ld20_vpll27_init(unsigned long reg_base);
int uniphier_ld20_dspll_init(unsigned long reg_base);

#endif /* MACH_PLL_H */
ARM: uniphier: move PLL init code to U-Boot proper where possible The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:09 +00:00			`/*`
			`* Copyright (C) 2016 Socionext Inc.`
			`* Author: Masahiro Yamada <yamada.masahiro@socionext.com>`
			`*`
			`* SPDX-License-Identifier: GPL-2.0+`
			`*/`

			`#ifndef MACH_PLL_H`
			`#define MACH_PLL_H`

ARM: uniphier: add PLL init code for LD20 SoC Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:11 +00:00			`#define UNIPHIER_PLL_FREQ_DEFAULT (0)`

ARM: uniphier: move PLL init code to U-Boot proper where possible The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:09 +00:00			`void uniphier_ld4_dpll_ssc_en(void);`

ARM: uniphier: add PLL init code for LD20 SoC Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:11 +00:00			`int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,`
			`unsigned int ssc_rate, unsigned int divn);`
			`int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base);`
ARM: uniphier: set up charge pump current for MPLL of LD11 SoC Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2017-02-21 14:00:35 +00:00			`int uniphier_ld20_sscpll_set_regi(unsigned long reg_base, unsigned regi);`
ARM: uniphier: add PLL init code for LD20 SoC Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot proper. Split the common code into pll-base-ld20.c for easier re-use. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:11 +00:00			`int uniphier_ld20_vpll27_init(unsigned long reg_base);`
			`int uniphier_ld20_dspll_init(unsigned long reg_base);`

ARM: uniphier: move PLL init code to U-Boot proper where possible The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2016-09-16 18:33:09 +00:00			`#endif /* MACH_PLL_H */`