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u-boot/include/configs/rk3188_common.h

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rockchip: rk3188: Add core support Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-18 18:46:36 +00:00
/*
* (C) Copyright 2015 Google, Inc
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_RK3188_COMMON_H
#define __CONFIG_RK3188_COMMON_H
#define CONFIG_SYS_CACHELINE_SIZE 64
#include <asm/arch/hardware.h>
#include "rockchip-common.h"
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
#define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_NS16550_MEM32
rockchip: back-to-bootrom: split BACK_TO_BOOTROM for TPL/SPL The back-to-bootrom option is rather unfortunately named CONFIG_ROCKCHIP_SPL_BACK_TO_BOOTROM instead of CONFIG_SPL_ROCKCHIP_BACK_TO_BOOTROM To make is selectable through CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BOOTROM), we need to rename it. At the same time, we introduce a TPL_ variant of the option to give us finer-grained control over when it should be used. This change is motivated by our RK3368 boot process, which returns to the boot ROM only from the TPL stage, but not from the SPL stage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> [added fix-up for evb-rk3229_defconfig and phycore-rk3288_defconfig:] [fixed inverted CONFIG_IS_ENABLED test for rk3288:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> include/configs/rock.h: undef
2017-06-29 09:21:15 +00:00
#ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
rockchip: rk3188: Add core support Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-18 18:46:36 +00:00
/* Bootrom will load u-boot binary to 0x60000000 once return from SPL */
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x60100000
#define CONFIG_SYS_LOAD_ADDR 0x60800800
#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800)
#define CONFIG_ROCKCHIP_CHIP_TAG "RK31"
rockchip: rk3188: use boot0 hook to load up SPL in 2 steps For the RK3188, the BROM will attempt to load up the first stage image (SPL for the RK3188) in two steps: first 1KB to offset 0x800 in the SRAM and then the remainder to offset 0xc00 in the SRAM. It always enters at 0x804, though. With this changeset, the RK3188 boot removes the TPL (stub) stage and builds a single SPL binary that utilizes the early back-to-bootrom via the boot0-hook. Consequently, the passing of the saved boot params via pmu->os_reg[2] is also removed. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-10-10 14:21:15 +00:00
#define CONFIG_SPL_TEXT_BASE 0x10080800
/* spl size 32kb sram - 2kb bootrom */
#define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800)
rockchip: rk3188: Add core support Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-18 18:46:36 +00:00
#define CONFIG_ROCKCHIP_SERIAL 1
#define CONFIG_SPL_STACK 0x10087fff
/* MMC/SD IP block */
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_NR_DRAM_BANKS 1
#define SDRAM_BANK_SIZE (2UL << 30)
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common
2017-06-23 08:11:05 +00:00
#define SDRAM_MAX_SIZE 0x80000000
rockchip: rk3188: Add core support Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
2017-02-18 18:46:36 +00:00
#define CONFIG_SPI_FLASH
#define CONFIG_SPI
#define CONFIG_SF_DEFAULT_SPEED 20000000
#ifndef CONFIG_SPL_BUILD
/* usb otg */
/* usb host support */
#define ENV_MEM_LAYOUT_SETTINGS \
"scriptaddr=0x60000000\0" \
"pxefile_addr_r=0x60100000\0" \
"fdt_addr_r=0x61f00000\0" \
"kernel_addr_r=0x62000000\0" \
"ramdisk_addr_r=0x64000000\0"
#include <config_distro_bootcmd.h>
/* Linux fails to load the fdt if it's loaded above 256M on a Rock board,
* so limit the fdt reallocation to that */
#define CONFIG_EXTRA_ENV_SETTINGS \
"fdt_high=0x6fffffff\0" \
"initrd_high=0x6fffffff\0" \
"partitions=" PARTS_DEFAULT \
ENV_MEM_LAYOUT_SETTINGS \
ROCKCHIP_DEVICE_SETTINGS \
BOOTENV
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_PREBOOT
#endif
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