2014-07-26 14:51:08 +00:00
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#include <common.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2014-07-26 14:51:08 +00:00
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#include <asm/arch/dram.h>
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static struct dram_para dram_para = {
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2015-01-17 13:24:55 +00:00
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.clock = CONFIG_DRAM_CLK,
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2021-12-02 23:57:54 +00:00
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.type = DRAM_MEMORY_TYPE_DDR3,
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2014-07-26 14:51:08 +00:00
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.rank_num = 1,
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2015-01-17 13:24:55 +00:00
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.density = 0,
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.io_width = 0,
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.bus_width = 0,
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.zq = CONFIG_DRAM_ZQ,
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2015-05-13 13:00:46 +00:00
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.odt_en = IS_ENABLED(CONFIG_DRAM_ODT_EN),
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2015-01-17 13:24:55 +00:00
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.size = 0,
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2015-01-31 22:27:05 +00:00
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#ifdef CONFIG_DRAM_TIMINGS_VENDOR_MAGIC
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.cas = 6,
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2014-07-26 14:51:08 +00:00
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.tpr0 = 0x30926692,
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.tpr1 = 0x1090,
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.tpr2 = 0x1a0c8,
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2015-01-31 22:27:05 +00:00
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.emr2 = 0,
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#else
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# include "dram_timings_sun4i.h"
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2015-01-31 22:27:06 +00:00
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.active_windowing = 1,
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2015-01-31 22:27:05 +00:00
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#endif
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2015-01-31 22:27:06 +00:00
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.tpr3 = CONFIG_DRAM_TPR3,
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2014-07-26 14:51:08 +00:00
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.tpr4 = 0,
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.tpr5 = 0,
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2015-01-17 13:24:55 +00:00
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.emr1 = CONFIG_DRAM_EMR1,
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2014-07-26 14:51:08 +00:00
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.emr3 = 0,
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2015-01-31 22:27:06 +00:00
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.dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY,
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2014-07-26 14:51:08 +00:00
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};
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unsigned long sunxi_dram_init(void)
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{
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return dramc_init(&dram_para);
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}
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