u-boot/arch/arm/mach-versal/Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2016 - 2018 Xilinx, Inc.
# Michal Simek <michal.simek@amd.com>
#

obj-y	+= clk.o
obj-y	+= cpu.o
obj-$(CONFIG_SYS_MEM_RSVD_FOR_MMU)	+= mp.o
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-08-22 12:55:27 +00:00			`# SPDX-License-Identifier: GPL-2.0+`
			`#`
			`# (C) Copyright 2016 - 2018 Xilinx, Inc.`
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com 2023-07-10 12:35:49 +00:00			`# Michal Simek <michal.simek@amd.com>`
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2018-08-22 12:55:27 +00:00			`#`

			`obj-y += clk.o`
			`obj-y += cpu.o`
arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU This patch adds new config option which is used for reserving a specific memory for MMU Table and in this case we are using TCM for that purpose. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2019-01-08 16:17:26 +00:00			`obj-$(CONFIG_SYS_MEM_RSVD_FOR_MMU) += mp.o`