2021-11-09 07:02:18 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* driver for mmio TCG/TIS TPM (trusted platform module).
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*
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* Specifications at www.trustedcomputinggroup.org
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <tpm-v2.h>
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#include <linux/bitops.h>
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#include <linux/compiler.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/unaligned/be_byteshift.h>
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#include "tpm_tis.h"
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#include "tpm_internal.h"
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/**
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* struct tpm_tis_chip_data - Information about an MMIO TPM
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* @pcr_count: Number of PCR per bank
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* @pcr_select_min: Minimum size in bytes of the pcrSelect array
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* @iobase: Base address
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*/
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struct tpm_tis_chip_data {
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unsigned int pcr_count;
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unsigned int pcr_select_min;
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void __iomem *iobase;
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};
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static int mmio_read_bytes(struct udevice *dev, u32 addr, u16 len,
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u8 *result)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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while (len--)
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*result++ = ioread8(drv_data->iobase + addr);
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return 0;
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}
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static int mmio_write_bytes(struct udevice *dev, u32 addr, u16 len,
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const u8 *value)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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while (len--)
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iowrite8(*value++, drv_data->iobase + addr);
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return 0;
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}
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static int mmio_read32(struct udevice *dev, u32 addr, u32 *result)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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*result = ioread32(drv_data->iobase + addr);
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return 0;
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}
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static int mmio_write32(struct udevice *dev, u32 addr, u32 value)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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iowrite32(value, drv_data->iobase + addr);
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return 0;
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}
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static struct tpm_tis_phy_ops phy_ops = {
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.read_bytes = mmio_read_bytes,
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.write_bytes = mmio_write_bytes,
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.read32 = mmio_read32,
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.write32 = mmio_write32,
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};
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static int tpm_tis_probe(struct udevice *dev)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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struct tpm_chip_priv *priv = dev_get_uclass_priv(dev);
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int ret = 0;
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fdt_addr_t ioaddr;
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u64 sz;
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ioaddr = dev_read_addr(dev);
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if (ioaddr == FDT_ADDR_T_NONE)
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return log_msg_ret("ioaddr", -EINVAL);
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ret = dev_read_u64(dev, "reg", &sz);
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if (ret)
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return -EINVAL;
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drv_data->iobase = ioremap(ioaddr, sz);
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tpm_tis_ops_register(dev, &phy_ops);
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ret = tpm_tis_init(dev);
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if (ret)
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goto iounmap;
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priv->pcr_count = drv_data->pcr_count;
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priv->pcr_select_min = drv_data->pcr_select_min;
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/*
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* Although the driver probably works with a TPMv1 our Kconfig
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* limits the driver to TPMv2 only
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*/
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priv->version = TPM_V2;
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return ret;
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iounmap:
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iounmap(drv_data->iobase);
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return -EINVAL;
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}
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static int tpm_tis_remove(struct udevice *dev)
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{
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struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev);
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2021-11-28 23:03:44 +00:00
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int ret;
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ret = tpm_tis_cleanup(dev);
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2021-11-09 07:02:18 +00:00
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iounmap(drv_data->iobase);
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2021-11-28 23:03:44 +00:00
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return ret;
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2021-11-09 07:02:18 +00:00
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}
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static const struct tpm_ops tpm_tis_ops = {
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.open = tpm_tis_open,
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.close = tpm_tis_close,
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.get_desc = tpm_tis_get_desc,
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.send = tpm_tis_send,
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.recv = tpm_tis_recv,
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.cleanup = tpm_tis_cleanup,
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};
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static const struct tpm_tis_chip_data tpm_tis_std_chip_data = {
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.pcr_count = 24,
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.pcr_select_min = 3,
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};
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static const struct udevice_id tpm_tis_ids[] = {
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{
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.compatible = "tcg,tpm-tis-mmio",
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.data = (ulong)&tpm_tis_std_chip_data,
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},
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{ }
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};
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U_BOOT_DRIVER(tpm_tis_mmio) = {
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.name = "tpm_tis_mmio",
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.id = UCLASS_TPM,
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.of_match = tpm_tis_ids,
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.ops = &tpm_tis_ops,
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.probe = tpm_tis_probe,
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.remove = tpm_tis_remove,
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.priv_auto = sizeof(struct tpm_chip),
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};
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