2015-01-13 22:24:05 +00:00
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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2021-06-28 14:17:29 +00:00
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CONFIG_DEFAULT_DEVICE_TREE="sun9i-a80-optimus"
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2018-04-08 00:27:54 +00:00
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CONFIG_SPL=y
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2015-01-13 22:24:05 +00:00
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CONFIG_MACH_SUN9I=y
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sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-28 10:21:37 +00:00
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CONFIG_DRAM_CLK=672
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE"
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CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT"
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CONFIG_USB0_ID_DET="PH3"
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CONFIG_USB1_VBUS_PIN="PH4"
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CONFIG_USB3_VBUS_PIN="PH5"
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CONFIG_AXP_GPIO=y
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2021-10-15 12:06:20 +00:00
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CONFIG_SYS_I2C_SUN8I_RSB=y
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sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-28 10:21:37 +00:00
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CONFIG_AXP809_POWER=y
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