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28 lines
719 B
C
28 lines
719 B
C
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration settings for the Renesas GRPEACH board
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*
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* Copyright (C) 2017-2019 Renesas Electronics
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*/
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#ifndef __GRPEACH_H
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#define __GRPEACH_H
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/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
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/* Miscellaneous */
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/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024)
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/* Network interface */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
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#define CONFIG_SH_ETHER_CACHE_WRITEBACK
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#define CONFIG_SH_ETHER_CACHE_INVALIDATE
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#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
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#endif /* __GRPEACH_H */
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