2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <common.h>
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2017-05-17 23:18:03 +00:00
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#include <dm.h>
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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#include <linux/compat.h>
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#include <dm/pinctrl.h>
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DECLARE_GLOBAL_DATA_PTR;
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/**
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* pinctrl_pin_name_to_selector() - return the pin selector for a pin
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*
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* @dev: pin controller device
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* @pin: the pin name to look up
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* @return: pin selector, or negative error code on failure
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*/
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static int pinctrl_pin_name_to_selector(struct udevice *dev, const char *pin)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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unsigned npins, selector;
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if (!ops->get_pins_count || !ops->get_pin_name) {
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dev_dbg(dev, "get_pins_count or get_pin_name missing\n");
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return -ENOSYS;
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}
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npins = ops->get_pins_count(dev);
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/* See if this pctldev has this pin */
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for (selector = 0; selector < npins; selector++) {
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const char *pname = ops->get_pin_name(dev, selector);
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if (!strcmp(pin, pname))
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return selector;
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}
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return -ENOSYS;
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}
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/**
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* pinctrl_group_name_to_selector() - return the group selector for a group
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*
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* @dev: pin controller device
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* @group: the pin group name to look up
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* @return: pin group selector, or negative error code on failure
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*/
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static int pinctrl_group_name_to_selector(struct udevice *dev,
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const char *group)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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unsigned ngroups, selector;
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if (!ops->get_groups_count || !ops->get_group_name) {
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dev_dbg(dev, "get_groups_count or get_group_name missing\n");
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return -ENOSYS;
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}
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ngroups = ops->get_groups_count(dev);
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/* See if this pctldev has this group */
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for (selector = 0; selector < ngroups; selector++) {
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const char *gname = ops->get_group_name(dev, selector);
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if (!strcmp(group, gname))
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return selector;
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}
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return -ENOSYS;
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}
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#if CONFIG_IS_ENABLED(PINMUX)
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/**
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* pinmux_func_name_to_selector() - return the function selector for a function
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*
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* @dev: pin controller device
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* @function: the function name to look up
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* @return: function selector, or negative error code on failure
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*/
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static int pinmux_func_name_to_selector(struct udevice *dev,
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const char *function)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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unsigned nfuncs, selector = 0;
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if (!ops->get_functions_count || !ops->get_function_name) {
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dev_dbg(dev,
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"get_functions_count or get_function_name missing\n");
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return -ENOSYS;
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}
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nfuncs = ops->get_functions_count(dev);
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/* See if this pctldev has this function */
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for (selector = 0; selector < nfuncs; selector++) {
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const char *fname = ops->get_function_name(dev, selector);
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if (!strcmp(function, fname))
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return selector;
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}
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return -ENOSYS;
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}
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/**
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* pinmux_enable_setting() - enable pin-mux setting for a certain pin/group
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*
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* @dev: pin controller device
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* @is_group: target of operation (true: pin group, false: pin)
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* @selector: pin selector or group selector, depending on @is_group
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* @func_selector: function selector
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinmux_enable_setting(struct udevice *dev, bool is_group,
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unsigned selector, unsigned func_selector)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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if (is_group) {
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if (!ops->pinmux_group_set) {
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dev_dbg(dev, "pinmux_group_set op missing\n");
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return -ENOSYS;
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}
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return ops->pinmux_group_set(dev, selector, func_selector);
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} else {
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if (!ops->pinmux_set) {
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dev_dbg(dev, "pinmux_set op missing\n");
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return -ENOSYS;
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}
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return ops->pinmux_set(dev, selector, func_selector);
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}
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}
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#else
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static int pinmux_func_name_to_selector(struct udevice *dev,
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const char *function)
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{
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return 0;
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}
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static int pinmux_enable_setting(struct udevice *dev, bool is_group,
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unsigned selector, unsigned func_selector)
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{
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return 0;
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}
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#endif
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#if CONFIG_IS_ENABLED(PINCONF)
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/**
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* pinconf_prop_name_to_param() - return parameter ID for a property name
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*
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* @dev: pin controller device
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* @property: property name in DTS, such as "bias-pull-up", "slew-rate", etc.
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* @default_value: return default value in case no value is specified in DTS
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* @return: return pamater ID, or negative error code on failure
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*/
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static int pinconf_prop_name_to_param(struct udevice *dev,
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const char *property, u32 *default_value)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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const struct pinconf_param *p, *end;
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if (!ops->pinconf_num_params || !ops->pinconf_params) {
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dev_dbg(dev, "pinconf_num_params or pinconf_params missing\n");
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return -ENOSYS;
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}
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p = ops->pinconf_params;
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end = p + ops->pinconf_num_params;
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/* See if this pctldev supports this parameter */
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for (; p < end; p++) {
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if (!strcmp(property, p->property)) {
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*default_value = p->default_value;
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return p->param;
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}
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}
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return -ENOSYS;
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}
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/**
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* pinconf_enable_setting() - apply pin configuration for a certain pin/group
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*
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* @dev: pin controller device
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* @is_group: target of operation (true: pin group, false: pin)
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* @selector: pin selector or group selector, depending on @is_group
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* @param: configuration paramter
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* @argument: argument taken by some configuration parameters
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinconf_enable_setting(struct udevice *dev, bool is_group,
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unsigned selector, unsigned param,
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u32 argument)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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if (is_group) {
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if (!ops->pinconf_group_set) {
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dev_dbg(dev, "pinconf_group_set op missing\n");
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return -ENOSYS;
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}
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return ops->pinconf_group_set(dev, selector, param,
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argument);
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} else {
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if (!ops->pinconf_set) {
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dev_dbg(dev, "pinconf_set op missing\n");
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return -ENOSYS;
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}
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return ops->pinconf_set(dev, selector, param, argument);
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}
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}
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#else
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static int pinconf_prop_name_to_param(struct udevice *dev,
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const char *property, u32 *default_value)
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{
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return -ENOSYS;
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}
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static int pinconf_enable_setting(struct udevice *dev, bool is_group,
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unsigned selector, unsigned param,
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u32 argument)
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{
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return 0;
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}
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#endif
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/**
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* pinctrl_generic_set_state_one() - set state for a certain pin/group
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* Apply all pin multiplexing and pin configurations specified by @config
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* for a given pin or pin group.
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*
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* @dev: pin controller device
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* @config: pseudo device pointing to config node
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* @is_group: target of operation (true: pin group, false: pin)
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* @selector: pin selector or group selector, depending on @is_group
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_generic_set_state_one(struct udevice *dev,
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struct udevice *config,
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bool is_group, unsigned selector)
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{
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const void *fdt = gd->fdt_blob;
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2017-01-17 23:52:55 +00:00
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int node_offset = dev_of_offset(config);
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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const char *propname;
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const void *value;
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int prop_offset, len, func_selector, param, ret;
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u32 arg, default_val;
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for (prop_offset = fdt_first_property_offset(fdt, node_offset);
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prop_offset > 0;
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prop_offset = fdt_next_property_offset(fdt, prop_offset)) {
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value = fdt_getprop_by_offset(fdt, prop_offset,
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&propname, &len);
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if (!value)
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return -EINVAL;
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if (!strcmp(propname, "function")) {
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func_selector = pinmux_func_name_to_selector(dev,
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value);
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if (func_selector < 0)
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return func_selector;
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ret = pinmux_enable_setting(dev, is_group,
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selector,
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func_selector);
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} else {
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param = pinconf_prop_name_to_param(dev, propname,
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&default_val);
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if (param < 0)
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continue; /* just skip unknown properties */
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if (len >= sizeof(fdt32_t))
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arg = fdt32_to_cpu(*(fdt32_t *)value);
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else
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arg = default_val;
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ret = pinconf_enable_setting(dev, is_group,
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selector, param, arg);
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}
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if (ret)
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return ret;
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}
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return 0;
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}
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/**
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* pinctrl_generic_set_state_subnode() - apply all settings in config node
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*
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* @dev: pin controller device
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* @config: pseudo device pointing to config node
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_generic_set_state_subnode(struct udevice *dev,
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struct udevice *config)
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{
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const void *fdt = gd->fdt_blob;
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2017-01-17 23:52:55 +00:00
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int node = dev_of_offset(config);
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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|
const char *subnode_target_type = "pins";
|
|
|
|
bool is_group = false;
|
|
|
|
const char *name;
|
|
|
|
int strings_count, selector, i, ret;
|
|
|
|
|
2016-10-17 11:43:01 +00:00
|
|
|
strings_count = fdt_stringlist_count(fdt, node, subnode_target_type);
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
if (strings_count < 0) {
|
|
|
|
subnode_target_type = "groups";
|
|
|
|
is_group = true;
|
2016-10-17 11:43:01 +00:00
|
|
|
strings_count = fdt_stringlist_count(fdt, node,
|
|
|
|
subnode_target_type);
|
2016-08-16 09:49:47 +00:00
|
|
|
if (strings_count < 0) {
|
|
|
|
/* skip this node; may contain config child nodes */
|
|
|
|
return 0;
|
|
|
|
}
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < strings_count; i++) {
|
2016-10-02 23:59:28 +00:00
|
|
|
name = fdt_stringlist_get(fdt, node, subnode_target_type, i,
|
|
|
|
NULL);
|
|
|
|
if (!name)
|
pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (is_group)
|
|
|
|
selector = pinctrl_group_name_to_selector(dev, name);
|
|
|
|
else
|
|
|
|
selector = pinctrl_pin_name_to_selector(dev, name);
|
|
|
|
if (selector < 0)
|
|
|
|
return selector;
|
|
|
|
|
|
|
|
ret = pinctrl_generic_set_state_one(dev, config,
|
|
|
|
is_group, selector);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pinctrl_generic_set_state(struct udevice *dev, struct udevice *config)
|
|
|
|
{
|
|
|
|
struct udevice *child;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = pinctrl_generic_set_state_subnode(dev, config);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
for (device_find_first_child(config, &child);
|
|
|
|
child;
|
|
|
|
device_find_next_child(&child)) {
|
|
|
|
ret = pinctrl_generic_set_state_subnode(dev, child);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|