2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2011-08-22 12:27:38 +00:00
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/*
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* (C) Copyright 2011
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* eInfochips Ltd. <www.einfochips.com>
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2016-12-21 07:58:06 +00:00
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* Written-by: Ajay Bhargav <contact@8051projects.net>
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2011-08-22 12:27:38 +00:00
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*
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* (C) Copyright 2010
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* Marvell Semiconductor <www.marvell.com>
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*/
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#ifndef _ASM_ARCH_GPIO_H
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#define _ASM_ARCH_GPIO_H
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#include <asm/types.h>
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#include <asm/arch/armada100.h>
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#define GPIO_HIGH 1
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#define GPIO_LOW 0
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#define GPIO_TO_REG(gp) (gp >> 5)
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#define GPIO_TO_BIT(gp) (1 << (gp & 0x1F))
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#define GPIO_VAL(gp, val) ((val >> (gp & 0x1F)) & 0x01)
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static inline void *get_gpio_base(int bank)
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{
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const unsigned int offset[4] = {0, 4, 8, 0x100};
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/* gpio register bank offset - refer Appendix A.36 */
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return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
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}
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#endif /* _ASM_ARCH_GPIO_H */
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