u-boot/board/nvidia/venice2/as3722_init.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2013
 * NVIDIA Corporation <www.nvidia.com>
 */

/* AS3722-PMIC-specific early init regs */

#define AS3722_I2C_ADDR		0x80

#define AS3722_SD0VOLTAGE_REG	0x00	/* CPU */
#define AS3722_SD1VOLTAGE_REG	0x01	/* CORE, already set by OTP */
#define AS3722_SD6VOLTAGE_REG	0x06	/* GPU */
#define AS3722_SDCONTROL_REG	0x4D

#define AS3722_LDO2VOLTAGE_REG	0x12	/* VPP_FUSE */
#define AS3722_LDO6VOLTAGE_REG	0x16	/* VDD_SDMMC */
#define AS3722_LDCONTROL_REG	0x4E

#if defined(CONFIG_TARGET_VENICE2)
#define AS3722_SD0VOLTAGE_DATA	(0x2800 | AS3722_SD0VOLTAGE_REG)
#else /* TK1 or Nyan-Big */
#define AS3722_SD0VOLTAGE_DATA	(0x3C00 | AS3722_SD0VOLTAGE_REG)
#endif
#define AS3722_SD0CONTROL_DATA	(0x0100 | AS3722_SDCONTROL_REG)

#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM)
#define AS3722_SD1VOLTAGE_DATA	(0x2800 | AS3722_SD1VOLTAGE_REG)
#define AS3722_SD1CONTROL_DATA	(0x0200 | AS3722_SDCONTROL_REG)
#endif

#define AS3722_SD6CONTROL_DATA	(0x4000 | AS3722_SDCONTROL_REG)
#define AS3722_SD6VOLTAGE_DATA	(0x2800 | AS3722_SD6VOLTAGE_REG)

#define AS3722_LDO2CONTROL_DATA	(0x0400 | AS3722_LDCONTROL_REG)
#define AS3722_LDO2VOLTAGE_DATA	(0x1000 | AS3722_LDO2VOLTAGE_REG)

#define AS3722_LDO6CONTROL_DATA	(0x4000 | AS3722_LDCONTROL_REG)
#define AS3722_LDO6VOLTAGE_DATA	(0x3F00 | AS3722_LDO6VOLTAGE_REG)

#define I2C_SEND_2_BYTES	0x0A02

void pmic_enable_cpu_vdd(void);
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-01-24 19:46:18 +00:00			`/*`
			`* (C) Copyright 2013`
			`* NVIDIA Corporation <www.nvidia.com>`
			`*/`

			`/* AS3722-PMIC-specific early init regs */`

			`#define AS3722_I2C_ADDR 0x80`

			`#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */`
			`#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */`
			`#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */`
			`#define AS3722_SDCONTROL_REG 0x4D`

			`#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */`
			`#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */`
			`#define AS3722_LDCONTROL_REG 0x4E`

ARM: tegra: Add support for TK1-SOM board from Colorado Engineering The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-08-30 22:54:46 +00:00			`#if defined(CONFIG_TARGET_VENICE2)`
ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-01-24 19:46:18 +00:00			`#define AS3722_SD0VOLTAGE_DATA (0x2800 \| AS3722_SD0VOLTAGE_REG)`
ARM: tegra: Add support for TK1-SOM board from Colorado Engineering The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-08-30 22:54:46 +00:00			`#else /* TK1 or Nyan-Big */`
			`#define AS3722_SD0VOLTAGE_DATA (0x3C00 \| AS3722_SD0VOLTAGE_REG)`
ARM: tegra: add Jetson TK1 board Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-03-25 17:39:33 +00:00			`#endif`
ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-01-24 19:46:18 +00:00			`#define AS3722_SD0CONTROL_DATA (0x0100 \| AS3722_SDCONTROL_REG)`

ARM: tegra: Add support for TK1-SOM board from Colorado Engineering The Colorado TK1 SOM is a small form factor board similar to the Jetson TK1. The main differences lie in the pinmux, and in that the PCIe controller is set to use in 4lanes+1lane, rather than 2+2. The pinmux header here was generated from a spreadsheet provided by Colorado Engineering using the tegra-pinmux scripts. The spreadsheet was converted from v09 to v11 by me. Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-08-30 22:54:46 +00:00			`#if defined(CONFIG_TARGET_JETSON_TK1) \|\| defined(CONFIG_TARGET_CEI_TK1_SOM)`
ARM: tegra: set vdd_core for Jetson TK1 Program vdd_core for Jetson TK1 to 1V, which is the max safe voltage for ultra low temperature operations. vdd_cpu and vdd_gpu are already at 1V. Signed-off-by: Bibek Basu <bbasu@nvidia.com> (swarren: fixed comments to better match the code) (swarren: moved board ifdef around data in header, made code generic) (swarren: fixed typos in commit description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-08-11 22:28:28 +00:00			`#define AS3722_SD1VOLTAGE_DATA (0x2800 \| AS3722_SD1VOLTAGE_REG)`
ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-01-24 19:46:18 +00:00			`#define AS3722_SD1CONTROL_DATA (0x0200 \| AS3722_SDCONTROL_REG)`
ARM: tegra: set vdd_core for Jetson TK1 Program vdd_core for Jetson TK1 to 1V, which is the max safe voltage for ultra low temperature operations. vdd_cpu and vdd_gpu are already at 1V. Signed-off-by: Bibek Basu <bbasu@nvidia.com> (swarren: fixed comments to better match the code) (swarren: moved board ifdef around data in header, made code generic) (swarren: fixed typos in commit description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-08-11 22:28:28 +00:00			`#endif`
ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 2014-01-24 19:46:18 +00:00
			`#define AS3722_SD6CONTROL_DATA (0x4000 \| AS3722_SDCONTROL_REG)`
			`#define AS3722_SD6VOLTAGE_DATA (0x2800 \| AS3722_SD6VOLTAGE_REG)`

			`#define AS3722_LDO2CONTROL_DATA (0x0400 \| AS3722_LDCONTROL_REG)`
			`#define AS3722_LDO2VOLTAGE_DATA (0x1000 \| AS3722_LDO2VOLTAGE_REG)`

			`#define AS3722_LDO6CONTROL_DATA (0x4000 \| AS3722_LDCONTROL_REG)`
			`#define AS3722_LDO6VOLTAGE_DATA (0x3F00 \| AS3722_LDO6VOLTAGE_REG)`

			`#define I2C_SEND_2_BYTES 0x0A02`

			`void pmic_enable_cpu_vdd(void);`