2020-01-10 14:51:47 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright(C) 2019
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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#ifndef __ASM_ARCH_IMX_REGS_H__
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#define __ASM_ARCH_IMX_REGS_H__
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#define ARCH_MXC
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#define GPIO1_BASE_ADDR 0x401B8000
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#define GPIO2_BASE_ADDR 0x401BC000
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#define GPIO3_BASE_ADDR 0x401C0000
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#define GPIO4_BASE_ADDR 0x401C4000
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#define GPIO5_BASE_ADDR 0x400C0000
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#define ANATOP_BASE_ADDR 0x400d8000
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2020-04-08 15:10:14 +00:00
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#define MXS_LCDIF_BASE 0x402b8000
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
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#include <asm/mach-imx/regs-lcdif.h>
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#endif
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2020-01-10 14:51:47 +00:00
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#endif /* __ASM_ARCH_IMX_REGS_H__ */
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