u-boot/arch/avr32/include/asm/arch-at32ap700x/hardware.h

/*
 * Copyright (C) 2005-2006 Atmel Corporation
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __AT32AP7000_HARDWARE_H__
#define __AT32AP7000_HARDWARE_H__

/* Internal and external memories */
#define EBI_SRAM_CS0_BASE			0x00000000
#define EBI_SRAM_CS0_SIZE			0x04000000
#define EBI_SRAM_CS4_BASE			0x04000000
#define EBI_SRAM_CS4_SIZE			0x04000000
#define EBI_SRAM_CS2_BASE			0x08000000
#define EBI_SRAM_CS2_SIZE			0x04000000
#define EBI_SRAM_CS3_BASE			0x0c000000
#define EBI_SRAM_CS3_SIZE			0x04000000
#define EBI_SRAM_CS1_BASE			0x10000000
#define EBI_SRAM_CS1_SIZE			0x10000000
#define EBI_SRAM_CS5_BASE			0x20000000
#define EBI_SRAM_CS5_SIZE			0x04000000

#define EBI_SDRAM_BASE				EBI_SRAM_CS1_BASE
#define EBI_SDRAM_SIZE				EBI_SRAM_CS1_SIZE

#define INTERNAL_SRAM_BASE			0x24000000
#define INTERNAL_SRAM_SIZE			0x00008000

/* Devices on the High Speed Bus (HSB) */
#define LCDC_BASE					0xFF000000
#define DMAC_BASE					0xFF200000
#define USB_FIFO					0xFF300000

/* Devices on Peripheral Bus A (PBA) */
#define ATMEL_BASE_SPI0				0xFFE00000
#define ATMEL_BASE_SPI1				0xFFE00400
#define ATMEL_BASE_TWI0				0xFFE00800
#define ATMEL_BASE_USART0			0xFFE00C00
#define ATMEL_BASE_USART1			0xFFE01000
#define ATMEL_BASE_USART2			0xFFE01400
#define ATMEL_BASE_USART3			0xFFE01800
#define ATMEL_BASE_SSC0				0xFFE01C00
#define ATMEL_BASE_SSC1				0xFFE02000
#define ATMEL_BASE_SSC2				0xFFE02400
#define ATMEL_BASE_PIOA				0xFFE02800
#define ATMEL_BASE_PIOB				0xFFE02C00
#define ATMEL_BASE_PIOC				0xFFE03000
#define ATMEL_BASE_PIOD				0xFFE03400
#define ATMEL_BASE_PIOE				0xFFE03800
#define ATMEL_BASE_PSIF				0xFFE03C00

/* Devices on Peripheral Bus B (PBB) */
#define ATMEL_BASE_SM				0xFFF00000
#define ATMEL_BASE_INTC				0xFFF00400
#define ATMEL_BASE_HMATRIX			0xFFF00800
#define ATMEL_BASE_TIMER0			0xFFF00C00
#define ATMEL_BASE_TIMER1			0xFFF01000
#define ATMEL_BASE_PWM				0xFFF01400
#define ATMEL_BASE_MACB0			0xFFF01800
#define ATMEL_BASE_MACB1			0xFFF01C00
#define ATMEL_BASE_DAC				0xFFF02000
#define ATMEL_BASE_MMCI				0xFFF02400
#define ATMEL_BASE_AUDIOC			0xFFF02800
#define ATMEL_BASE_HISI				0xFFF02C00
#define ATMEL_BASE_USB				0xFFF03000
#define ATMEL_BASE_HSMC				0xFFF03400
#define ATMEL_BASE_HSDRAMC			0xFFF03800
#define ATMEL_BASE_ECC				0xFFF03C00

#endif /* __AT32AP7000_HARDWARE_H__ */
Add AT32AP CPU and AT32AP7000 SoC support Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-10-24 12:27:35 +00:00			`/*`
			`* Copyright (C) 2005-2006 Atmel Corporation`
			`*`
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 2013-07-08 07:37:19 +00:00			`* SPDX-License-Identifier: GPL-2.0+`
Add AT32AP CPU and AT32AP7000 SoC support Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-10-24 12:27:35 +00:00			`*/`
avr32: fixup definitions to ATMEL_BASE_xxx Signed-off-by: Andreas Bießmann <biessmann@corscience.de> 2010-11-04 23:15:31 +00:00			`#ifndef __AT32AP7000_HARDWARE_H__`
			`#define __AT32AP7000_HARDWARE_H__`
Add AT32AP CPU and AT32AP7000 SoC support Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-10-24 12:27:35 +00:00
avr32: Rework SDRAM initialization code This cleans up the SDRAM initialization and related code a bit, and allows faster booting. * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h * Remove memory test from sdram_init() and make caller responsible for verifying the SDRAM and determining its size. * Remove base_address member from struct sdram_config (was sdram_info) * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT * Add support for a common STK1000 hack: 16MB SDRAM instead of 8. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> 2008-05-19 09:36:28 +00:00			`/* Internal and external memories */`
			`#define EBI_SRAM_CS0_BASE 0x00000000`
			`#define EBI_SRAM_CS0_SIZE 0x04000000`
			`#define EBI_SRAM_CS4_BASE 0x04000000`
			`#define EBI_SRAM_CS4_SIZE 0x04000000`
			`#define EBI_SRAM_CS2_BASE 0x08000000`
			`#define EBI_SRAM_CS2_SIZE 0x04000000`
			`#define EBI_SRAM_CS3_BASE 0x0c000000`
			`#define EBI_SRAM_CS3_SIZE 0x04000000`
			`#define EBI_SRAM_CS1_BASE 0x10000000`
			`#define EBI_SRAM_CS1_SIZE 0x10000000`
			`#define EBI_SRAM_CS5_BASE 0x20000000`
			`#define EBI_SRAM_CS5_SIZE 0x04000000`

			`#define EBI_SDRAM_BASE EBI_SRAM_CS1_BASE`
			`#define EBI_SDRAM_SIZE EBI_SRAM_CS1_SIZE`

			`#define INTERNAL_SRAM_BASE 0x24000000`
			`#define INTERNAL_SRAM_SIZE 0x00008000`

AVR32: Clean up memory-map.h for at32ap7000 Convert spaces to tabs (must have missed this one last time around), sort the entries by address and group them together by bus connectivity. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-11-18 17:01:13 +00:00			`/* Devices on the High Speed Bus (HSB) */`
avr32: fixup definitions to ATMEL_BASE_xxx Signed-off-by: Andreas Bießmann <biessmann@corscience.de> 2010-11-04 23:15:31 +00:00			`#define LCDC_BASE 0xFF000000`
			`#define DMAC_BASE 0xFF200000`
			`#define USB_FIFO 0xFF300000`
Add AT32AP CPU and AT32AP7000 SoC support Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the AT32AP CPU family and the AT32AP7000 chip, which is the first chip implementing the AVR32 architecture. The AT32AP CPU core is a high-performance implementation featuring a 7-stage pipeline, separate instruction- and data caches, and a MMU. For more information, please see the "AVR32 AP Technical Reference": http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf In addition to this, the AT32AP7000 chip comes with a large set of integrated peripherals, many of which are shared with the AT91 series of ARM-based microcontrollers from Atmel. Full data sheet is available here: http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-10-24 12:27:35 +00:00
AVR32: Clean up memory-map.h for at32ap7000 Convert spaces to tabs (must have missed this one last time around), sort the entries by address and group them together by bus connectivity. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-11-18 17:01:13 +00:00			`/* Devices on Peripheral Bus A (PBA) */`
avr32: fixup definitions to ATMEL_BASE_xxx Signed-off-by: Andreas Bießmann <biessmann@corscience.de> 2010-11-04 23:15:31 +00:00			`#define ATMEL_BASE_SPI0 0xFFE00000`
			`#define ATMEL_BASE_SPI1 0xFFE00400`
			`#define ATMEL_BASE_TWI0 0xFFE00800`
			`#define ATMEL_BASE_USART0 0xFFE00C00`
			`#define ATMEL_BASE_USART1 0xFFE01000`
			`#define ATMEL_BASE_USART2 0xFFE01400`
			`#define ATMEL_BASE_USART3 0xFFE01800`
			`#define ATMEL_BASE_SSC0 0xFFE01C00`
			`#define ATMEL_BASE_SSC1 0xFFE02000`
			`#define ATMEL_BASE_SSC2 0xFFE02400`
			`#define ATMEL_BASE_PIOA 0xFFE02800`
			`#define ATMEL_BASE_PIOB 0xFFE02C00`
			`#define ATMEL_BASE_PIOC 0xFFE03000`
			`#define ATMEL_BASE_PIOD 0xFFE03400`
			`#define ATMEL_BASE_PIOE 0xFFE03800`
			`#define ATMEL_BASE_PSIF 0xFFE03C00`
AVR32: Clean up memory-map.h for at32ap7000 Convert spaces to tabs (must have missed this one last time around), sort the entries by address and group them together by bus connectivity. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-11-18 17:01:13 +00:00
			`/* Devices on Peripheral Bus B (PBB) */`
avr32: fixup definitions to ATMEL_BASE_xxx Signed-off-by: Andreas Bießmann <biessmann@corscience.de> 2010-11-04 23:15:31 +00:00			`#define ATMEL_BASE_SM 0xFFF00000`
			`#define ATMEL_BASE_INTC 0xFFF00400`
			`#define ATMEL_BASE_HMATRIX 0xFFF00800`
			`#define ATMEL_BASE_TIMER0 0xFFF00C00`
			`#define ATMEL_BASE_TIMER1 0xFFF01000`
			`#define ATMEL_BASE_PWM 0xFFF01400`
			`#define ATMEL_BASE_MACB0 0xFFF01800`
			`#define ATMEL_BASE_MACB1 0xFFF01C00`
			`#define ATMEL_BASE_DAC 0xFFF02000`
			`#define ATMEL_BASE_MMCI 0xFFF02400`
			`#define ATMEL_BASE_AUDIOC 0xFFF02800`
			`#define ATMEL_BASE_HISI 0xFFF02C00`
			`#define ATMEL_BASE_USB 0xFFF03000`
			`#define ATMEL_BASE_HSMC 0xFFF03400`
			`#define ATMEL_BASE_HSDRAMC 0xFFF03800`
			`#define ATMEL_BASE_ECC 0xFFF03C00`
AVR32: Clean up memory-map.h for at32ap7000 Convert spaces to tabs (must have missed this one last time around), sort the entries by address and group them together by bus connectivity. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> 2006-11-18 17:01:13 +00:00
avr32: fixup definitions to ATMEL_BASE_xxx Signed-off-by: Andreas Bießmann <biessmann@corscience.de> 2010-11-04 23:15:31 +00:00			`#endif /* __AT32AP7000_HARDWARE_H__ */`