2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-06-21 05:55:07 +00:00
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/*
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* Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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* Copyright (C) 2012 Renesas Solutions Corp.
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*/
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#ifndef __KZM9G_H
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#define __KZM9G_H
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#define CONFIG_SH73A0
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#include <asm/arch/rmobile.h>
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/* MEMORY */
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#define KZM_SDRAM_BASE (0x40000000)
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#define PHYS_SDRAM KZM_SDRAM_BASE
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#define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
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/* NOR Flash */
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#define KZM_FLASH_BASE (0x00000000)
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#define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
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/* prompt */
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* SCIF */
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
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#define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
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#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
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2012-07-05 01:43:44 +00:00
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#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
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#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
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2012-06-21 05:55:07 +00:00
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
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/* FLASH */
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#define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
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/* Timeout for Flash erase operations (in ms) */
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/* Timeout for Flash write operations (in ms) */
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/* Timeout for Flash set sector lock bit operations (in ms) */
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/* Timeout for Flash clear lock bit operations (in ms) */
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/* GPIO / PFC */
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#define CONFIG_SH_GPIO_PFC
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/* Clock */
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2012-08-03 04:56:52 +00:00
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#define CONFIG_GLOBAL_TIMER
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2012-06-21 05:55:07 +00:00
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#define CONFIG_SYS_CPU_CLK (1196000000)
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#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
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#endif /* __KZM9G_H */
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