2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2009-06-20 09:01:53 +00:00
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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2015-10-22 10:36:31 +00:00
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* Copyright (C) 2015 Stefan Roese <sr@denx.de>
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2009-06-20 09:01:53 +00:00
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*/
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#include <common.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2011-10-18 14:41:42 +00:00
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#include <asm/io.h>
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2014-10-22 10:13:06 +00:00
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#include <asm/arch/soc.h>
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2020-05-10 17:40:13 +00:00
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#include <linux/bitops.h>
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2009-06-20 09:01:53 +00:00
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2015-10-22 10:36:31 +00:00
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#define TIMER_LOAD_VAL 0xffffffff
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2009-06-20 09:01:53 +00:00
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2021-05-20 11:23:52 +00:00
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static int init_done __section(".data") = 0;
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2009-06-20 09:01:53 +00:00
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/*
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2015-10-22 10:36:31 +00:00
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* Timer initialization
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2009-06-20 09:01:53 +00:00
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*/
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int timer_init(void)
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{
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2015-07-15 13:36:52 +00:00
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/* Only init the timer once */
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if (init_done)
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return 0;
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init_done = 1;
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2009-06-20 09:01:53 +00:00
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/* load value into timer */
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2015-10-22 10:36:31 +00:00
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writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10);
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writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14);
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2009-06-20 09:01:53 +00:00
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2015-12-21 12:56:33 +00:00
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#if defined(CONFIG_ARCH_MVEBU)
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2015-10-22 10:36:31 +00:00
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/* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */
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setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11));
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#endif
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2009-06-20 09:01:53 +00:00
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/* enable timer in auto reload mode */
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2015-10-22 10:36:31 +00:00
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setbits_le32(MVEBU_TIMER_BASE + 0x00, 0x3);
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2009-06-20 09:01:53 +00:00
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return 0;
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}
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