2018-08-16 13:27:31 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*/
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#ifndef __CONFIG_GARDENA_SMART_GATEWAY_H
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#define __CONFIG_GARDENA_SMART_GATEWAY_H
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/* CPU */
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2019-01-31 06:24:43 +00:00
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#define CONFIG_SYS_MIPS_TIMER_FREQ 290000000
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2018-08-16 13:27:31 +00:00
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/* RAM */
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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2020-04-21 07:28:48 +00:00
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/* SPL */
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#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
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2018-08-16 13:27:31 +00:00
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#endif
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2020-04-21 07:28:48 +00:00
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#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SPL_BSS_START_ADDR 0x80010000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_PAD_TO 0
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/* Dummy value */
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#define CONFIG_SYS_UBOOT_BASE 0
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/* Serial SPL */
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL_SUPPORT)
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_NS16550_CLK 40000000
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM1 0xb0000c00
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#define CONFIG_CONS_INDEX 1
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#endif
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2018-08-16 13:27:31 +00:00
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/* UART */
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \
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2019-09-25 09:45:42 +00:00
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230400, 460800, 921600 }
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2018-08-16 13:27:31 +00:00
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/* RAM */
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/* Memory usage */
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#define CONFIG_SYS_MAXARGS 64
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2018-10-09 06:59:14 +00:00
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#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
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2018-08-16 13:27:31 +00:00
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#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
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#define CONFIG_SYS_CBSIZE 512
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/* U-Boot */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
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/* Environment settings */
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/*
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* Environment is right behind U-Boot in flash. Make sure U-Boot
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* doesn't grow into the environment area.
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*/
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#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET
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#endif /* __CONFIG_GARDENA_SMART_GATEWAY_H */
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