2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2015-10-22 23:58:20 +00:00
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/*
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* Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
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* Copyright (C) 2009, Wind River Systems Inc
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* Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
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*/
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#include <common.h>
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2019-11-14 19:57:37 +00:00
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#include <cpu_func.h>
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2015-10-22 23:58:20 +00:00
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#include <asm/cache.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2015-10-22 23:58:20 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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static void __flush_dcache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(gd->arch.dcache_line_size - 1);
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end += (gd->arch.dcache_line_size - 1);
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end &= ~(gd->arch.dcache_line_size - 1);
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for (addr = start; addr < end; addr += gd->arch.dcache_line_size) {
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__asm__ __volatile__ (" flushda 0(%0)\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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}
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static void __flush_dcache_all(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(gd->arch.dcache_line_size - 1);
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end += (gd->arch.dcache_line_size - 1);
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end &= ~(gd->arch.dcache_line_size - 1);
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if (end > start + gd->arch.dcache_size)
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end = start + gd->arch.dcache_size;
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for (addr = start; addr < end; addr += gd->arch.dcache_line_size) {
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__asm__ __volatile__ (" flushd 0(%0)\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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}
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static void __invalidate_dcache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(gd->arch.dcache_line_size - 1);
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end += (gd->arch.dcache_line_size - 1);
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end &= ~(gd->arch.dcache_line_size - 1);
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for (addr = start; addr < end; addr += gd->arch.dcache_line_size) {
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__asm__ __volatile__ (" initda 0(%0)\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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}
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static void __flush_icache(unsigned long start, unsigned long end)
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{
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unsigned long addr;
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start &= ~(gd->arch.icache_line_size - 1);
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end += (gd->arch.icache_line_size - 1);
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end &= ~(gd->arch.icache_line_size - 1);
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if (end > start + gd->arch.icache_size)
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end = start + gd->arch.icache_size;
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for (addr = start; addr < end; addr += gd->arch.icache_line_size) {
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__asm__ __volatile__ (" flushi %0\n"
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: /* Outputs */
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: /* Inputs */ "r"(addr)
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/* : No clobber */);
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}
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__asm__ __volatile(" flushp\n");
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}
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void flush_dcache_all(void)
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{
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__flush_dcache_all(0, gd->arch.dcache_size);
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__flush_icache(0, gd->arch.icache_size);
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}
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void flush_dcache_range(unsigned long start, unsigned long end)
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{
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if (gd->arch.has_initda)
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__flush_dcache(start, end);
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else
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__flush_dcache_all(start, end);
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}
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void flush_cache(unsigned long start, unsigned long size)
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{
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if (gd->arch.has_initda)
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__flush_dcache(start, start + size);
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else
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__flush_dcache_all(start, start + size);
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__flush_icache(start, start + size);
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}
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void invalidate_dcache_range(unsigned long start, unsigned long end)
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{
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if (gd->arch.has_initda)
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__invalidate_dcache(start, end);
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else
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__flush_dcache_all(start, end);
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}
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int dcache_status(void)
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{
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return 1;
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}
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void dcache_enable(void)
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{
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flush_dcache_all();
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}
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void dcache_disable(void)
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{
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flush_dcache_all();
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}
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