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165 lines
6.2 KiB
Text
165 lines
6.2 KiB
Text
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TI K3 R5F processor subsystems
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==============================
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The TI K3 family of SoCs usually have one or more dual-core Arm Cortex
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R5F processor subsystems/clusters (R5FSS). The dual core cluster can be
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used either in a LockStep mode providing safety/fault tolerance features
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or in a Split mode providing two individual compute cores for doubling
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the compute capacity. These are used together with other processors
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present on the SoC to achieve various system level goals.
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R5F Sub-System Device Node:
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===========================
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Each Dual-Core R5F sub-system is represented as a single DTS node representing
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the cluster, with a pair of child DT nodes representing the individual R5F
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cores. Each node has a number of required or optional properties that enable
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the OS running on the host processor to perform the device management of the
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remote processor and to communicate with the remote processor.
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Required properties:
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--------------------
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The following are the mandatory properties:
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- compatible: Should be one of the following,
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"ti,am654-r5fss" for R5F clusters/subsystems on
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K3 AM65x SoCs
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"ti,j721e-r5fss" for R5F clusters/subsystems on
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K3 J721E SoCs
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- power-domains: Should contain a phandle to a PM domain provider node
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and an args specifier containing the R5FSS device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
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- #address-cells: Should be 1
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- #size-cells: Should be 1
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- ranges: Standard ranges definition providing translations for
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R5F TCM address spaces
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Optional properties:
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--------------------
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- lockstep-mode: Configuration Mode for the Dual R5F cores within the R5F
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cluster. Should be either a value of 1 (LockStep mode) or
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0 (Split mode), default is LockStep mode if omitted.
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R5F Processor Child Nodes:
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==========================
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The R5F Sub-System device node should define two R5F child nodes, each node
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representing a TI instantiation of the Arm Cortex R5F core. There are some
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specific integration differences for the IP like the usage of a Region Address
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Translator (RAT) for translating the larger SoC bus addresses into a 32-bit
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address space for the processor.
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Required properties:
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--------------------
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The following are the mandatory properties:
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- compatible: Should be one of the following,
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"ti,am654-r5f" for the R5F cores in K3 AM65x SoCs
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"ti,j721e-r5f" for the R5F cores in K3 J721E SOCs
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- reg: Should contain an entry for each value in 'reg-names'.
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Each entry should have the memory region's start address
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and the size of the region, the representation matching
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the parent node's '#address-cells' and '#size-cells' values.
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- reg-names: Should contain strings with the following names, each
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representing a specific internal memory region, and
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should be defined in this order,
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"atcm", "btcm"
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- ti,sci: Should be a phandle to the TI-SCI System Controller node
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- ti,sci-dev-id: Should contain the TI-SCI device id corresponding to the
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R5F Core. Please refer to the corresponding System
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Controller documentation for valid values for the R5F
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cores.
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- ti,sci-proc-ids: Should contain 2 integer values. The first cell should
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contain the TI-SCI processor id for the R5F core device
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and the second cell should contain the TI-SCI host id to
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which the processor control ownership should be
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transferred to.
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- resets: Should contain the phandle to the reset controller node
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managing the resets for this device, and a reset
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specifier. Please refer to the following reset bindings
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for the reset argument specifier,
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Documentation/devicetree/bindings/reset/ti,sci-reset.txt
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for AM65x and J721E SoCs
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Optional properties:
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--------------------
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The following properties are optional properties for each of the R5F cores:
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- atcm-enable: R5F core configuration mode dictating if ATCM should be
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enabled. Should be either a value of 1 (enabled) or
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0 (disabled), default is disabled if omitted. R5F view
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of ATCM dictated by loczrama property.
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- btcm-enable: R5F core configuration mode dictating if BTCM should be
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enabled. Should be either a value of 1 (enabled) or
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0 (disabled), default is enabled if omitted. R5F view
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of BTCM dictated by loczrama property.
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- loczrama: R5F core configuration mode dictating which TCM should
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appear at address 0 (from core's view). Should be either
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a value of 1 (ATCM at 0x0) or 0 (BTCM at 0x0), default
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value is 1 if omitted.
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Example:
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--------
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1. AM654 SoC
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/* AM65x remoteproc alias */
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aliases {
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remoteproc0 = &mcu_r5fss0_core0;
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};
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cbass_main: interconnect@100000 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
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<0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
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<0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>;
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cbass_mcu: interconnect@28380000 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
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<0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
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<0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; /* MCU SRAM */
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/* AM65x MCU R5FSS node */
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mcu_r5fss0: r5fss@41000000 {
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compatible = "ti,am654-r5fss";
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power-domains = <&k3_pds 129>;
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lockstep-mode = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x41000000 0x00 0x41000000 0x20000>,
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<0x41400000 0x00 0x41400000 0x20000>;
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mcu_r5f0: r5f@41000000 {
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compatible = "ti,am654-r5f";
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reg = <0x41000000 0x00008000>,
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<0x41010000 0x00008000>;
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reg-names = "atcm", "btcm";
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <159>;
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ti,sci-proc-ids = <0x01 0xFF>;
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resets = <&k3_reset 159 1>;
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atcm-enable = <1>;
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btcm-enable = <1>;
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loczrama = <1>;
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};
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mcu_r5f1: r5f@41400000 {
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compatible = "ti,am654-r5f";
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reg = <0x41400000 0x00008000>,
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<0x41410000 0x00008000>;
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reg-names = "atcm", "btcm";
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ti,sci = <&dmsc>;
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ti,sci-dev-id = <245>;
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ti,sci-proc-ids = <0x02 0xFF>;
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resets = <&k3_reset 245 1>;
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atcm-enable = <1>;
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btcm-enable = <1>;
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loczrama = <1>;
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};
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};
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};
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};
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