2018-06-12 00:39:53 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Dennis Gilmore <dgilmore@redhat.com>
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*/
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#ifndef _CONFIG_HELIOS4_H
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#define _CONFIG_HELIOS4_H
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2020-05-10 17:40:09 +00:00
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#include <linux/stringify.h>
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2018-12-04 16:57:24 +00:00
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2018-06-12 00:39:53 +00:00
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/*
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* High Level Configuration Options (easy to change)
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*/
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/*
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* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_ENV_MIN_ENTRIES 128
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2020-06-27 20:00:16 +00:00
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/* Environment in MMC */
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2018-06-12 00:39:53 +00:00
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/*
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2020-06-27 20:00:16 +00:00
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* For SD - reserve 1 LBA for MBR + 1M for u-boot image. The MMC/eMMC
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* boot image starts @ LBA-0.
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* As result in MMC/eMMC case it will be a 1 sector gap between u-boot
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* image and environment
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2018-06-12 00:39:53 +00:00
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*/
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2020-06-27 20:00:16 +00:00
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
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2018-12-04 16:57:24 +00:00
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2020-06-27 20:00:16 +00:00
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/* PCIe support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PCI_SCAN_SHOW
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2018-12-04 16:57:24 +00:00
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#endif
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2018-06-12 00:39:53 +00:00
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/* Keep device tree and initrd in lower memory so the kernel can access them */
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#define RELOCATION_LIMITS_ENV_SETTINGS \
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"fdt_high=0x10000000\0" \
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"initrd_high=0x10000000\0"
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/* SPL */
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/* Defines for SPL */
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#define CONFIG_SPL_SIZE (140 << 10)
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
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2021-07-23 09:14:32 +00:00
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#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
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2018-06-12 00:39:53 +00:00
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/* SPL related MMC defines */
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
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#endif
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#endif
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2020-06-27 20:00:16 +00:00
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2018-06-12 00:39:53 +00:00
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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*/
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#include "mv-common.h"
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/* Include the common distro boot environment */
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#ifndef CONFIG_SPL_BUILD
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#ifdef CONFIG_MMC
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#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
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#else
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#define BOOT_TARGET_DEVICES_MMC(func)
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#endif
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#ifdef CONFIG_USB_STORAGE
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#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
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#else
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#define BOOT_TARGET_DEVICES_USB(func)
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#endif
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2020-06-27 20:00:16 +00:00
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#ifndef CONFIG_SCSI
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#define BOOT_TARGET_DEVICES_SCSI_BUS0(func)
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#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
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#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
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#else
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/*
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* With SCSI enabled, M.2 SATA is always located on bus 0
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*/
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#define BOOT_TARGET_DEVICES_SCSI_BUS0(func) func(SCSI, scsi, 0)
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/*
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* Either one or both mPCIe slots may be configured as mSATA interfaces. The
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* SCSI bus ids are assigned based on sequence of hardware present, not always
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* tied to hardware slot ids. As such, use second SCSI bus if either slot is
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* set for SATA, and only use third SCSI bus if both slots are SATA enabled.
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*/
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#if defined (CONFIG_HELIOS4_CON2_SATA) || defined (CONFIG_HELIOS4_CON3_SATA)
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#define BOOT_TARGET_DEVICES_SCSI_BUS1(func) func(SCSI, scsi, 1)
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#else
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#define BOOT_TARGET_DEVICES_SCSI_BUS1(func)
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#endif
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#if defined (CONFIG_HELIOS4_CON2_SATA) && defined (CONFIG_HELIOS4_CON3_SATA)
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#define BOOT_TARGET_DEVICES_SCSI_BUS2(func) func(SCSI, scsi, 2)
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2018-06-12 00:39:53 +00:00
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#else
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2020-06-27 20:00:16 +00:00
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#define BOOT_TARGET_DEVICES_SCSI_BUS2(func)
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2018-06-12 00:39:53 +00:00
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#endif
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2020-06-27 20:00:16 +00:00
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#endif /* CONFIG_SCSI */
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/*
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* The SCSI buses are attempted in increasing bus order, there is no current
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* mechanism to alter the default bus priority order for booting.
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*/
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2018-06-12 00:39:53 +00:00
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#define BOOT_TARGET_DEVICES(func) \
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BOOT_TARGET_DEVICES_MMC(func) \
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BOOT_TARGET_DEVICES_USB(func) \
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2020-06-27 20:00:16 +00:00
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BOOT_TARGET_DEVICES_SCSI_BUS0(func) \
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BOOT_TARGET_DEVICES_SCSI_BUS1(func) \
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BOOT_TARGET_DEVICES_SCSI_BUS2(func) \
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2018-06-12 00:39:53 +00:00
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#define KERNEL_ADDR_R __stringify(0x800000)
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#define FDT_ADDR_R __stringify(0x100000)
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#define RAMDISK_ADDR_R __stringify(0x1800000)
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#define SCRIPT_ADDR_R __stringify(0x200000)
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#define PXEFILE_ADDR_R __stringify(0x300000)
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#define LOAD_ADDRESS_ENV_SETTINGS \
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"kernel_addr_r=" KERNEL_ADDR_R "\0" \
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"fdt_addr_r=" FDT_ADDR_R "\0" \
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"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
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"scriptaddr=" SCRIPT_ADDR_R "\0" \
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"pxefile_addr_r=" PXEFILE_ADDR_R "\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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RELOCATION_LIMITS_ENV_SETTINGS \
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LOAD_ADDRESS_ENV_SETTINGS \
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"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
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"console=ttyS0,115200\0" \
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BOOTENV
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#endif /* CONFIG_SPL_BUILD */
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#endif /* _CONFIG_HELIOS4_H */
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