2018-08-27 10:25:24 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Texas Instruments' OMAP serial driver
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <dt-structs.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2018-08-27 10:25:24 +00:00
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#include <ns16550.h>
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#include <serial.h>
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#include <clk.h>
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2020-02-03 14:36:15 +00:00
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#include <linux/err.h>
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2018-08-27 10:25:24 +00:00
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2022-11-16 18:10:28 +00:00
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#ifndef CFG_SYS_NS16550_CLK
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#define CFG_SYS_NS16550_CLK 0
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2018-08-27 10:25:24 +00:00
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#endif
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#ifdef CONFIG_DEBUG_UART_OMAP
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2023-01-10 16:19:45 +00:00
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#ifndef CFG_SYS_NS16550_IER
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#define CFG_SYS_NS16550_IER 0x00
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2018-12-03 14:12:25 +00:00
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#endif
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#define UART_MCRVAL 0x00
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#define UART_LCRVAL UART_LCR_8N1
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static inline void serial_out_shift(void *addr, int shift, int value)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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outb(value, (ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
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out_le32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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out_be32(addr, value);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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writel(value, addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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writeb(value, addr + (1 << shift) - 1);
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#else
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writeb(value, addr);
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#endif
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}
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static inline int serial_in_shift(void *addr, int shift)
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{
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#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
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return inb((ulong)addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
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return in_le32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
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return in_be32(addr);
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#elif defined(CONFIG_SYS_NS16550_MEM32)
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return readl(addr);
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#elif defined(CONFIG_SYS_BIG_ENDIAN)
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return readb(addr + (1 << shift) - 1);
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#else
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return readb(addr);
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#endif
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}
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2018-08-27 10:25:24 +00:00
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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2022-05-27 20:15:24 +00:00
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struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
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2018-08-27 10:25:24 +00:00
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int baud_divisor;
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baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
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CONFIG_BAUDRATE);
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2023-01-10 16:19:45 +00:00
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serial_dout(&com_port->ier, CFG_SYS_NS16550_IER);
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2018-08-27 10:25:24 +00:00
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serial_dout(&com_port->mdr1, 0x7);
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serial_dout(&com_port->mcr, UART_MCRVAL);
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serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
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serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
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serial_dout(&com_port->dll, baud_divisor & 0xff);
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serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
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serial_dout(&com_port->lcr, UART_LCRVAL);
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serial_dout(&com_port->mdr1, 0x0);
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}
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static inline void _debug_uart_putc(int ch)
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{
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2022-05-27 20:15:24 +00:00
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struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
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2018-08-27 10:25:24 +00:00
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while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
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;
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serial_dout(&com_port->thr, ch);
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}
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DEBUG_UART_FUNCS
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#endif
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#if CONFIG_IS_ENABLED(DM_SERIAL)
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2021-08-07 13:24:03 +00:00
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#if CONFIG_IS_ENABLED(OF_REAL)
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2020-12-03 23:55:21 +00:00
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static int omap_serial_of_to_plat(struct udevice *dev)
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2018-08-27 10:25:24 +00:00
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{
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2020-12-23 02:30:28 +00:00
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struct ns16550_plat *plat = dev_get_plat(dev);
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2018-08-27 10:25:24 +00:00
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fdt_addr_t addr;
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struct clk clk;
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int err;
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/* try Processor Local Bus device first */
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addr = dev_read_addr(dev);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
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plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
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plat->reg_shift = 2;
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err = clk_get_by_index(dev, 0, &clk);
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if (!err) {
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err = clk_get_rate(&clk);
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if (!IS_ERR_VALUE(err))
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plat->clock = err;
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} else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
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debug("omap serial failed to get clock\n");
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return err;
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}
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if (!plat->clock)
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plat->clock = dev_read_u32_default(dev, "clock-frequency",
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2022-11-16 18:10:28 +00:00
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CFG_SYS_NS16550_CLK);
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2018-08-27 10:25:24 +00:00
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if (!plat->clock) {
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debug("omap serial clock not defined\n");
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return -EINVAL;
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}
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plat->fcr = UART_FCR_DEFVAL;
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return 0;
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}
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static const struct udevice_id omap_serial_ids[] = {
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{ .compatible = "ti,omap2-uart", },
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{ .compatible = "ti,omap3-uart", },
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{ .compatible = "ti,omap4-uart", },
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{ .compatible = "ti,am3352-uart", },
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{ .compatible = "ti,am4372-uart", },
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{ .compatible = "ti,dra742-uart", },
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2018-09-14 14:13:35 +00:00
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{ .compatible = "ti,am654-uart", },
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2018-08-27 10:25:24 +00:00
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{}
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};
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2021-08-07 13:24:03 +00:00
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#endif /* OF_REAL */
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2018-08-27 10:25:24 +00:00
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#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
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U_BOOT_DRIVER(omap_serial) = {
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.name = "omap_serial",
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.id = UCLASS_SERIAL,
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2021-08-07 13:24:03 +00:00
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#if CONFIG_IS_ENABLED(OF_REAL)
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2018-08-27 10:25:24 +00:00
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.of_match = omap_serial_ids,
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2020-12-03 23:55:21 +00:00
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.of_to_plat = omap_serial_of_to_plat,
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2020-12-03 23:55:23 +00:00
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.plat_auto = sizeof(struct ns16550_plat),
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2018-08-27 10:25:24 +00:00
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#endif
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2020-12-23 02:30:18 +00:00
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.priv_auto = sizeof(struct ns16550),
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2018-08-27 10:25:24 +00:00
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.probe = ns16550_serial_probe,
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.ops = &ns16550_serial_ops,
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2018-10-24 13:36:36 +00:00
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#if !CONFIG_IS_ENABLED(OF_CONTROL)
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2018-08-27 10:25:24 +00:00
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.flags = DM_FLAG_PRE_RELOC,
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2018-10-24 13:36:36 +00:00
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#endif
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2018-08-27 10:25:24 +00:00
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};
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#endif
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#endif /* DM_SERIAL */
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