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soc: ti: k3: add navss ringacc driver The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. The RINGACC converts constant-address read and write accesses to equivalent read or write accesses to a circular data structure in memory. The RINGACC eliminates the need for each DMA controller which needs to access ring elements from having to know the current state of the ring (base address, current offset). The DMA controller performs a read or write access to a specific address range (which maps to the source interface on the RINGACC) and the RINGACC replaces the address for the transaction with a new address which corresponds to the head or tail element of the ring (head for reads, tail for writes). Since the RINGACC maintains the state, multiple DMA controllers or channels are allowed to coherently share the same rings as applicable. The RINGACC is able to place data which is destined towards software into cached memory directly. Supported ring modes: - Ring Mode - Messaging Mode - Credentials Mode - Queue Manager Mode TI-SCI integration: Texas Instrument's System Control Interface (TI-SCI) Message Protocol now has control over Ringacc module resources management (RM) and Rings configuration. The Ringacc driver manages Rings allocation by itself now and requests TI-SCI firmware to allocate and configure specific Rings only. It's done this way because, Linux driver implements two stage Rings allocation and configuration (allocate ring and configure ring) while TI-SCI Message Protocol supports only one combined operation (allocate+configure). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-02-05 12:01:22 +00:00
menu "SOC (System On Chip) specific Drivers"
dm: soc: Introduce UCLASS_SOC for SOC ID and attribute matching Introduce UCLASS_SOC to be used for SOC identification and attribute matching based on the SoC ID info. This allows drivers to be provided for SoCs to retrieve SoC identifying information and also for matching device attributes for selecting SoC specific data. This is useful for other device drivers that may need different parameters or quirks enabled depending on the specific device variant in use. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-16 04:39:57 +00:00
config SOC_DEVICE
bool "Enable SoC Device ID drivers using Driver Model"
help
This allows drivers to be provided for SoCs to help in identifying
the SoC in use and matching SoC attributes for selecting SoC
specific data. This is useful for other device drivers that may
need different parameters or quirks enabled depending on the
specific device variant in use.
dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs Introduce an soc_ti_k3_driver that allows identification and selection of SoC specific data based on the JTAG ID register for device identification, as described for AM65x[0] and J721E[1] devices. [0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf [1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-16 04:39:59 +00:00
config SOC_DEVICE_TI_K3
soc: soc_ti_k3: Use hardware.h to remove definition duplication The K3 JTAG and SoC ID information is already stored in the K3 arch hardware file, include that and use its definitions here. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-04-06 16:38:12 +00:00
depends on SOC_DEVICE && ARCH_K3
dm: soc: Introduce soc_ti_k3 driver for TI K3 SoCs Introduce an soc_ti_k3_driver that allows identification and selection of SoC specific data based on the JTAG ID register for device identification, as described for AM65x[0] and J721E[1] devices. [0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf [1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2020-07-16 04:39:59 +00:00
bool "Enable SoC Device ID driver for TI K3 SoCs"
help
This allows Texas Instruments Keystone 3 SoCs to identify
specifics about the SoC in use.
soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-10 12:50:18 +00:00
config SOC_XILINX_ZYNQMP
bool "Enable SoC Device ID driver for Xilinx ZynqMP"
depends on SOC_DEVICE && ARCH_ZYNQMP
help
Enable this option to select SoC device id driver for Xilinx ZynqMP.
This allows other drivers to verify the SoC familiy & revision
using matching SoC attributes.
soc: xilinx: versal: Add soc_xilinx_versal driver soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-10 12:50:19 +00:00
config SOC_XILINX_VERSAL
bool "Enable SoC Device ID driver for Xilinx Versal"
depends on SOC_DEVICE && ARCH_VERSAL
help
Enable this option to select SoC device id driver for Xilinx Versal.
This allows other drivers to verify the SoC familiy & revision using
matching SoC attributes.
soc: xilinx: versal-net: Add soc_xilinx_versal_net driver Add soc_xilinx_versal_net driver to identify the family & revision of versal-net SoC. Add Kconfig option CONFIG_SOC_XILINX_VERSAL_NET to enable/disable this driver. To enable this driver by default, add this config to xilinx_versal_net_virt_defconfig file. This driver will be probed using platdata U_BOOT_DEVICE structure which is specified in mach-versal-net/cpu.c. Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/613d6bcffd9070f62cf348079ed16c120f8fc56f.1668612993.git.michal.simek@amd.com
2022-11-16 15:36:35 +00:00
config SOC_XILINX_VERSAL_NET
bool "Enable SoC Device ID driver for Xilinx Versal NET"
depends on SOC_DEVICE && ARCH_VERSAL_NET
help
Enable this option to select SoC device id driver for Xilinx Versal NET.
This allows other drivers to verify the SoC familiy & revision using
matching SoC attributes.
soc: ti: k3: add navss ringacc driver The Ring Accelerator (RINGACC or RA) provides hardware acceleration to enable straightforward passing of work between a producer and a consumer. There is one RINGACC module per NAVSS on TI AM65x SoCs. The RINGACC converts constant-address read and write accesses to equivalent read or write accesses to a circular data structure in memory. The RINGACC eliminates the need for each DMA controller which needs to access ring elements from having to know the current state of the ring (base address, current offset). The DMA controller performs a read or write access to a specific address range (which maps to the source interface on the RINGACC) and the RINGACC replaces the address for the transaction with a new address which corresponds to the head or tail element of the ring (head for reads, tail for writes). Since the RINGACC maintains the state, multiple DMA controllers or channels are allowed to coherently share the same rings as applicable. The RINGACC is able to place data which is destined towards software into cached memory directly. Supported ring modes: - Ring Mode - Messaging Mode - Credentials Mode - Queue Manager Mode TI-SCI integration: Texas Instrument's System Control Interface (TI-SCI) Message Protocol now has control over Ringacc module resources management (RM) and Rings configuration. The Ringacc driver manages Rings allocation by itself now and requests TI-SCI firmware to allocate and configure specific Rings only. It's done this way because, Linux driver implements two stage Rings allocation and configuration (allocate ring and configure ring) while TI-SCI Message Protocol supports only one combined operation (allocate+configure). Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com>
2019-02-05 12:01:22 +00:00
source "drivers/soc/ti/Kconfig"
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