2019-12-07 04:42:58 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2019 Google LLC
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*/
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#ifndef _ASM_ARCH_UART_H
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#define _ASM_ARCH_UART_H
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2020-12-19 17:40:05 +00:00
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#include <ns16550.h>
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/**
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* struct apl_ns16550_plat - platform data for the APL UART
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*
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* Note that when of-platdata is in use, apl_ns16550_of_to_plat() actually
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* copies the ns16550_plat contents to the start of this struct, meaning that
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* dtplat is no-longer valid. This is done so that the ns16550 driver can use
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* dev_get_plat() without any offsets or adjustments.
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*/
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struct apl_ns16550_plat {
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#if CONFIG_IS_ENABLED(OF_PLATDATA)
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struct dtd_intel_apl_ns16550 dtplat;
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#endif
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struct ns16550_plat ns16550;
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};
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2019-12-07 04:42:58 +00:00
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/**
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* apl_uart_init() - Set up the APL UART device and clock
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*
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* This enables the PCI device, sets up the MMIO region and turns on the clock
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* using LPSS.
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*
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* The UART won't actually work unless the GPIO settings are correct and the
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* signals actually exit the SoC. See board_debug_uart_init() for that.
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*/
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2020-12-19 17:40:05 +00:00
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void apl_uart_init(pci_dev_t bdf, ulong base);
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2019-12-07 04:42:58 +00:00
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#endif
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