2002-11-19 11:04:11 +00:00
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#include "macros.h"
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.globl pci_read_cfg_byte
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2003-06-27 21:31:46 +00:00
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2002-11-19 11:04:11 +00:00
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pci_read_cfg_byte:
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config_addr
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config_data 3
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eieio
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sync
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lbz r3, 0(r9)
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blr
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.globl pci_write_cfg_byte
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2003-06-27 21:31:46 +00:00
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pci_write_cfg_byte:
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2002-11-19 11:04:11 +00:00
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config_addr
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config_data 3
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stb r6, 0(r9)
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eieio
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sync
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blr
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.globl pci_read_cfg_word
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2003-06-27 21:31:46 +00:00
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2002-11-19 11:04:11 +00:00
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pci_read_cfg_word:
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config_addr
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config_data 2
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lhbrx r3, 0, r9
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eieio
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sync
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blr
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.globl pci_write_cfg_word
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2003-06-27 21:31:46 +00:00
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2002-11-19 11:04:11 +00:00
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pci_write_cfg_word:
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config_addr
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config_data 2
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sthbrx r6, 0, r9
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eieio
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sync
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blr
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.globl pci_read_cfg_long
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2003-06-27 21:31:46 +00:00
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2002-11-19 11:04:11 +00:00
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pci_read_cfg_long:
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config_addr
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config_data 0
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lwbrx r3, 0, r9
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eieio
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sync
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blr
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.globl pci_write_cfg_long
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2003-06-27 21:31:46 +00:00
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2002-11-19 11:04:11 +00:00
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pci_write_cfg_long:
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config_addr
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config_data 0
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stwbrx r6, 0, r9
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eieio
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sync
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blr
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