2018-05-06 22:27:01 +00:00
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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2016-10-05 22:27:06 +00:00
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/*
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2019-01-08 11:42:29 +00:00
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* Copyright 2016-2019 Toradex AG
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2016-10-05 22:27:06 +00:00
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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2017-04-13 06:09:49 +00:00
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#include "imx7d.dtsi"
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2016-10-05 22:27:06 +00:00
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&i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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status = "okay";
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2016-10-05 22:27:10 +00:00
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rn5t567@33 {
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compatible = "ricoh,rn5t567";
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reg = <0x33>;
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};
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2016-10-05 22:27:06 +00:00
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};
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&i2c4 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c4>;
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pinctrl-1 = <&pinctrl_i2c4_gpio>;
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sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
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scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
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uart-has-rtscts;
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fsl,dte-mode;
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status = "okay";
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};
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2019-01-08 11:42:32 +00:00
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>;
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no-1-8-v;
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cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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disable-wp;
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status = "okay";
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};
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2016-10-05 22:27:06 +00:00
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&iomuxc {
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pinctrl_i2c4: i2c4-grp {
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fsl,pins = <
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MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f
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MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
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>;
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};
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pinctrl_i2c4_gpio: i2c4-gpio-grp {
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fsl,pins = <
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MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
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MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x4000007f
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>;
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};
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pinctrl_uart1: uart1-grp {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79
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MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79
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MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79
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MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79
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>;
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};
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pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
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fsl,pins = <
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MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */
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MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */
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>;
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};
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2019-01-08 11:42:32 +00:00
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pinctrl_usdhc1: usdhc1-grp {
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fsl,pins = <
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MX7D_PAD_SD1_CMD__SD1_CMD 0x59
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MX7D_PAD_SD1_CLK__SD1_CLK 0x19
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
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>;
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};
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2016-10-05 22:27:06 +00:00
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};
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&iomuxc_lpsr {
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pinctrl_i2c1: i2c1-grp {
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fsl,pins = <
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2017-04-13 06:09:49 +00:00
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MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
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MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
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2016-10-05 22:27:06 +00:00
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>;
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};
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pinctrl_i2c1_gpio: i2c1-gpio-grp {
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fsl,pins = <
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2017-04-13 06:09:49 +00:00
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MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
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MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x4000007f
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2016-10-05 22:27:06 +00:00
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>;
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};
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2019-01-08 11:42:32 +00:00
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pinctrl_cd_usdhc1: usdhc1-cd-grp {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */
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>;
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};
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2016-10-05 22:27:06 +00:00
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};
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2019-06-03 21:06:00 +00:00
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&lcdif {
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status = "okay";
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2019-06-19 08:47:06 +00:00
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display = <&display0>;
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u-boot,dm-pre-reloc;
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2019-06-03 21:06:00 +00:00
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2019-06-19 08:47:06 +00:00
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display0: display0 {
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bits-per-pixel = <18>;
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bus-width = <24>;
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status = "okay";
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display-timings {
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native-mode = <&timing_vga>;
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timing_vga: 640x480 {
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u-boot,dm-pre-reloc;
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clock-frequency = <25175000>;
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hactive = <640>;
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vactive = <480>;
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hback-porch = <48>;
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hfront-porch = <16>;
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vback-porch = <33>;
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vfront-porch = <10>;
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hsync-len = <96>;
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vsync-len = <2>;
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de-active = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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pixelclk-active = <0>;
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};
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2019-06-03 21:06:00 +00:00
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};
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};
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};
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