u-boot/configs/socfpga_chameleonv3_defconfig

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CONFIG_ARM=y
CONFIG_SYS_L2_PL310=y
CONFIG_ARCH_SOCFPGA=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x4400
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
CONFIG_SPL_FS_FAT=y
CONFIG_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x40000
2022-07-11 14:18:13 +00:00
CONFIG_SPL_NO_BSS_LIMIT=y
CONFIG_SPL_SYS_MALLOC=y
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xffe2b000
CONFIG_SPL_SYS_MALLOC_SIZE=0x15000
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FPGA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_I2C_DW=y
CONFIG_MISC=y
CONFIG_ATSHA204A=y
CONFIG_FS_LOADER=y
CONFIG_SPL_FS_LOADER=y
CONFIG_MMC_DW=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550_MEM32=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_DESIGNWARE_APB_TIMER=y