2022-10-21 00:22:39 +00:00
|
|
|
CONFIG_TEXT_BASE=0x200000
|
2021-08-07 13:24:12 +00:00
|
|
|
CONFIG_SPL_GPIO=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
|
|
CONFIG_NR_DRAM_BANKS=1
|
|
|
|
CONFIG_ENV_SIZE=0x2000
|
2023-10-14 20:48:05 +00:00
|
|
|
CONFIG_SPL_DM_SPI=y
|
2021-06-28 14:17:29 +00:00
|
|
|
CONFIG_DEFAULT_DEVICE_TREE="sandbox"
|
2023-02-17 14:58:06 +00:00
|
|
|
CONFIG_DM_RESET=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_MMC=y
|
2021-08-08 18:20:12 +00:00
|
|
|
CONFIG_SPL_SERIAL=y
|
2021-07-11 03:14:31 +00:00
|
|
|
CONFIG_SPL_DRIVERS_MISC=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
|
|
|
|
CONFIG_SPL=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_FS_FAT=y
|
2023-10-14 20:48:05 +00:00
|
|
|
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
|
|
|
CONFIG_SPL_SPI=y
|
2023-10-14 20:48:03 +00:00
|
|
|
CONFIG_SYS_LOAD_ADDR=0x1000000
|
2023-05-01 15:50:26 +00:00
|
|
|
CONFIG_PCI=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SANDBOX_SPL=y
|
|
|
|
CONFIG_DEBUG_UART=y
|
2022-04-01 14:33:18 +00:00
|
|
|
CONFIG_SYS_MEMTEST_START=0x00100000
|
|
|
|
CONFIG_SYS_MEMTEST_END=0x00101000
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_FIT=y
|
|
|
|
CONFIG_FIT_SIGNATURE=y
|
|
|
|
CONFIG_FIT_VERBOSE=y
|
|
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
|
|
CONFIG_BOOTSTAGE=y
|
|
|
|
CONFIG_BOOTSTAGE_REPORT=y
|
|
|
|
CONFIG_BOOTSTAGE_FDT=y
|
|
|
|
CONFIG_BOOTSTAGE_STASH=y
|
|
|
|
CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
|
|
|
|
CONFIG_CONSOLE_RECORD=y
|
|
|
|
CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
|
|
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
2022-05-19 19:09:22 +00:00
|
|
|
CONFIG_SPL_NO_BSS_LIMIT=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_HANDOFF=y
|
|
|
|
CONFIG_SPL_BOARD_INIT=y
|
2023-10-14 20:48:01 +00:00
|
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
2023-10-14 20:47:59 +00:00
|
|
|
CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
|
|
|
|
CONFIG_SPL_LOAD_IMX_CONTAINER=y
|
|
|
|
CONFIG_SPL_SYS_MALLOC=y
|
|
|
|
CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
|
|
|
|
CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xa000000
|
|
|
|
CONFIG_SPL_SYS_MALLOC_SIZE=0x4000000
|
2023-10-14 20:48:02 +00:00
|
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
|
|
|
|
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SPL_ENV_SUPPORT=y
|
2023-10-14 20:48:03 +00:00
|
|
|
CONFIG_SPL_ETH=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_FS_EXT4=y
|
2021-07-11 03:14:36 +00:00
|
|
|
CONFIG_SPL_I2C=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_MMC_WRITE=y
|
2023-11-04 20:37:53 +00:00
|
|
|
CONFIG_SPL_MTD=y
|
|
|
|
CONFIG_SPL_NAND_SUPPORT=y
|
|
|
|
CONFIG_SPL_NAND_DRIVERS=y
|
|
|
|
CONFIG_SPL_NAND_ECC=y
|
|
|
|
CONFIG_SPL_NAND_SOFTECC=y
|
|
|
|
CONFIG_SPL_NAND_BASE=y
|
|
|
|
CONFIG_SPL_NAND_IDENT=y
|
2023-10-14 20:48:05 +00:00
|
|
|
CONFIG_SPL_DM_SPI_FLASH=y
|
2023-10-14 20:48:03 +00:00
|
|
|
CONFIG_SPL_NET=y
|
2023-10-14 20:48:04 +00:00
|
|
|
CONFIG_SPL_NOR_SUPPORT=y
|
2021-08-08 18:20:11 +00:00
|
|
|
CONFIG_SPL_RTC=y
|
2023-10-14 20:48:05 +00:00
|
|
|
# CONFIG_SPL_SPI_FLASH_TINY is not set
|
|
|
|
CONFIG_SPL_SPI_LOAD=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CMD_CPU=y
|
|
|
|
CONFIG_CMD_LICENSE=y
|
|
|
|
CONFIG_CMD_BOOTZ=y
|
|
|
|
CONFIG_CMD_BOOTEFI_HELLO=y
|
|
|
|
# CONFIG_CMD_ELF is not set
|
|
|
|
CONFIG_CMD_ASKENV=y
|
|
|
|
CONFIG_CMD_GREPENV=y
|
|
|
|
CONFIG_CMD_ERASEENV=y
|
|
|
|
CONFIG_CMD_ENV_CALLBACK=y
|
|
|
|
CONFIG_CMD_ENV_FLAGS=y
|
|
|
|
CONFIG_CMD_NVEDIT_INFO=y
|
|
|
|
CONFIG_CMD_NVEDIT_LOAD=y
|
|
|
|
CONFIG_CMD_NVEDIT_SELECT=y
|
|
|
|
CONFIG_LOOPW=y
|
|
|
|
CONFIG_CMD_MD5SUM=y
|
|
|
|
CONFIG_CMD_MEMINFO=y
|
|
|
|
CONFIG_CMD_MX_CYCLIC=y
|
|
|
|
CONFIG_CMD_MEMTEST=y
|
|
|
|
CONFIG_CMD_DEMO=y
|
|
|
|
CONFIG_CMD_GPIO=y
|
|
|
|
CONFIG_CMD_GPT=y
|
|
|
|
CONFIG_CMD_IDE=y
|
|
|
|
CONFIG_CMD_I2C=y
|
nand: Add sandbox driver
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-04 20:37:52 +00:00
|
|
|
CONFIG_CMD_MTD=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CMD_OSD=y
|
|
|
|
CONFIG_CMD_PCI=y
|
|
|
|
CONFIG_CMD_REMOTEPROC=y
|
|
|
|
CONFIG_CMD_SPI=y
|
2022-09-06 11:30:35 +00:00
|
|
|
CONFIG_CMD_TEMPERATURE=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CMD_USB=y
|
|
|
|
CONFIG_BOOTP_DNS2=y
|
|
|
|
CONFIG_CMD_TFTPPUT=y
|
|
|
|
CONFIG_CMD_TFTPSRV=y
|
|
|
|
CONFIG_CMD_RARP=y
|
|
|
|
CONFIG_CMD_CDP=y
|
|
|
|
CONFIG_CMD_SNTP=y
|
|
|
|
CONFIG_CMD_DNS=y
|
|
|
|
CONFIG_CMD_LINK_LOCAL=y
|
|
|
|
CONFIG_CMD_BMP=y
|
|
|
|
CONFIG_CMD_EFIDEBUG=y
|
|
|
|
CONFIG_CMD_TIME=y
|
|
|
|
CONFIG_CMD_TIMER=y
|
|
|
|
CONFIG_CMD_SOUND=y
|
|
|
|
CONFIG_CMD_BOOTSTAGE=y
|
|
|
|
CONFIG_CMD_PMIC=y
|
|
|
|
CONFIG_CMD_REGULATOR=y
|
|
|
|
CONFIG_CMD_TPM=y
|
|
|
|
CONFIG_CMD_TPM_TEST=y
|
|
|
|
CONFIG_CMD_CBFS=y
|
|
|
|
CONFIG_CMD_CRAMFS=y
|
|
|
|
CONFIG_CMD_EXT4_WRITE=y
|
|
|
|
CONFIG_MAC_PARTITION=y
|
|
|
|
CONFIG_AMIGA_PARTITION=y
|
|
|
|
CONFIG_OF_CONTROL=y
|
|
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
|
|
CONFIG_SPL_OF_PLATDATA=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_OF_REAL=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_ENV_IS_NOWHERE=y
|
|
|
|
CONFIG_ENV_IS_IN_EXT4=y
|
|
|
|
CONFIG_ENV_EXT4_INTERFACE="host"
|
|
|
|
CONFIG_ENV_EXT4_DEVICE_AND_PART="0:0"
|
2023-10-14 20:48:03 +00:00
|
|
|
CONFIG_USE_BOOTFILE=y
|
|
|
|
CONFIG_BOOTFILE="uImage"
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_BOOTP_SEND_HOSTNAME=y
|
|
|
|
CONFIG_NETCONSOLE=y
|
|
|
|
CONFIG_IP_DEFRAG=y
|
2021-12-18 18:27:51 +00:00
|
|
|
CONFIG_BOOTP_SERVERIP=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SPL_DM=y
|
|
|
|
CONFIG_DM_DMA=y
|
|
|
|
CONFIG_REGMAP=y
|
|
|
|
CONFIG_SPL_REGMAP=y
|
|
|
|
CONFIG_SYSCON=y
|
|
|
|
CONFIG_SPL_SYSCON=y
|
|
|
|
CONFIG_DEVRES=y
|
|
|
|
CONFIG_DEBUG_DEVRES=y
|
|
|
|
# CONFIG_SPL_SIMPLE_BUS is not set
|
|
|
|
CONFIG_ADC=y
|
|
|
|
CONFIG_ADC_SANDBOX=y
|
|
|
|
CONFIG_AXI=y
|
|
|
|
CONFIG_AXI_SANDBOX=y
|
2023-10-14 20:48:01 +00:00
|
|
|
CONFIG_SPL_BLK_FS=y
|
2022-01-22 12:53:24 +00:00
|
|
|
CONFIG_SYS_IDE_MAXBUS=1
|
|
|
|
CONFIG_SYS_ATA_BASE_ADDR=0x100
|
|
|
|
CONFIG_SYS_ATA_STRIDE=4
|
|
|
|
CONFIG_SYS_ATA_DATA_OFFSET=0
|
|
|
|
CONFIG_SYS_ATA_REG_OFFSET=1
|
|
|
|
CONFIG_SYS_ATA_ALT_OFFSET=2
|
|
|
|
CONFIG_SYS_ATA_IDE0_OFFSET=0
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CLK=y
|
|
|
|
CONFIG_SPL_CLK=y
|
|
|
|
CONFIG_CPU=y
|
|
|
|
CONFIG_DM_DEMO=y
|
|
|
|
CONFIG_DM_DEMO_SIMPLE=y
|
|
|
|
CONFIG_DM_DEMO_SHAPE=y
|
|
|
|
CONFIG_SPL_FIRMWARE=y
|
|
|
|
CONFIG_GPIO_HOG=y
|
2022-08-04 14:27:17 +00:00
|
|
|
CONFIG_QCOM_PMIC_GPIO=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SANDBOX_GPIO=y
|
|
|
|
CONFIG_I2C_CROS_EC_TUNNEL=y
|
|
|
|
CONFIG_I2C_CROS_EC_LDO=y
|
|
|
|
CONFIG_DM_I2C_GPIO=y
|
2021-08-07 13:24:12 +00:00
|
|
|
# CONFIG_SPL_DM_I2C_GPIO is not set
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_I2C_MUX=y
|
|
|
|
CONFIG_I2C_ARB_GPIO_CHALLENGE=y
|
|
|
|
CONFIG_CROS_EC_KEYB=y
|
|
|
|
CONFIG_I8042_KEYB=y
|
2021-10-23 14:58:02 +00:00
|
|
|
CONFIG_IOMMU=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_LED=y
|
|
|
|
CONFIG_LED_BLINK=y
|
|
|
|
CONFIG_LED_GPIO=y
|
|
|
|
CONFIG_DM_MAILBOX=y
|
|
|
|
CONFIG_SANDBOX_MBOX=y
|
|
|
|
CONFIG_MISC=y
|
2022-05-05 17:11:40 +00:00
|
|
|
CONFIG_NVMEM=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CROS_EC=y
|
|
|
|
CONFIG_CROS_EC_I2C=y
|
|
|
|
CONFIG_CROS_EC_LPC=y
|
|
|
|
CONFIG_CROS_EC_SANDBOX=y
|
|
|
|
CONFIG_CROS_EC_SPI=y
|
|
|
|
CONFIG_P2SB=y
|
|
|
|
CONFIG_PWRSEQ=y
|
|
|
|
CONFIG_SPL_PWRSEQ=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_FS_LOADER=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_MMC_SANDBOX=y
|
nand: Add sandbox driver
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-04 20:37:52 +00:00
|
|
|
CONFIG_MTD=y
|
|
|
|
CONFIG_DM_MTD=y
|
2023-11-04 20:37:53 +00:00
|
|
|
CONFIG_MTD_CONCAT=y
|
nand: Add sandbox driver
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-04 20:37:52 +00:00
|
|
|
CONFIG_MTD_RAW_NAND=y
|
|
|
|
CONFIG_SYS_MAX_NAND_DEVICE=8
|
|
|
|
CONFIG_SYS_NAND_USE_FLASH_BBT=y
|
|
|
|
CONFIG_NAND_SANDBOX=y
|
2023-11-04 20:37:53 +00:00
|
|
|
CONFIG_SYS_NAND_BLOCK_SIZE=0x2000
|
nand: Add sandbox driver
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.
For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.
Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.
Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).
Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.
To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-04 20:37:52 +00:00
|
|
|
CONFIG_SYS_NAND_ONFI_DETECTION=y
|
|
|
|
CONFIG_SYS_NAND_PAGE_SIZE=0x200
|
2023-11-04 20:37:53 +00:00
|
|
|
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
|
|
|
|
CONFIG_SYS_NAND_U_BOOT_OFFS=0x0
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SPI_FLASH_SANDBOX=y
|
|
|
|
CONFIG_SPI_FLASH_ATMEL=y
|
|
|
|
CONFIG_SPI_FLASH_EON=y
|
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|
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CONFIG_SPI_FLASH_GIGADEVICE=y
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|
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_SST=y
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CONFIG_SPI_FLASH_WINBOND=y
|
2022-01-22 19:38:11 +00:00
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|
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CONFIG_NVME_PCI=y
|
2021-03-15 04:25:32 +00:00
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|
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CONFIG_PCI_SANDBOX=y
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|
|
|
CONFIG_PHY=y
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|
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CONFIG_PHY_SANDBOX=y
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|
|
CONFIG_PINCTRL=y
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|
|
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CONFIG_PINCONF=y
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|
|
CONFIG_PINCTRL_SANDBOX=y
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|
|
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CONFIG_DM_PMIC=y
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|
|
CONFIG_PMIC_ACT8846=y
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|
|
CONFIG_DM_PMIC_PFUZE100=y
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|
|
|
CONFIG_DM_PMIC_MAX77686=y
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|
|
|
CONFIG_DM_PMIC_MC34708=y
|
2022-08-04 14:27:17 +00:00
|
|
|
CONFIG_PMIC_QCOM=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_PMIC_RK8XX=y
|
|
|
|
CONFIG_PMIC_S2MPS11=y
|
|
|
|
CONFIG_DM_PMIC_SANDBOX=y
|
|
|
|
CONFIG_PMIC_S5M8767=y
|
|
|
|
CONFIG_PMIC_TPS65090=y
|
|
|
|
CONFIG_DM_REGULATOR=y
|
|
|
|
CONFIG_REGULATOR_ACT8846=y
|
|
|
|
CONFIG_DM_REGULATOR_PFUZE100=y
|
|
|
|
CONFIG_DM_REGULATOR_MAX77686=y
|
|
|
|
CONFIG_DM_REGULATOR_FIXED=y
|
|
|
|
CONFIG_REGULATOR_RK8XX=y
|
|
|
|
CONFIG_REGULATOR_S5M8767=y
|
|
|
|
CONFIG_DM_REGULATOR_SANDBOX=y
|
|
|
|
CONFIG_REGULATOR_TPS65090=y
|
|
|
|
CONFIG_DM_PWM=y
|
2021-05-19 16:33:31 +00:00
|
|
|
CONFIG_PWM_CROS_EC=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_PWM_SANDBOX=y
|
|
|
|
CONFIG_RAM=y
|
|
|
|
CONFIG_REMOTEPROC_SANDBOX=y
|
|
|
|
CONFIG_SANDBOX_RESET=y
|
|
|
|
CONFIG_DM_RTC=y
|
|
|
|
CONFIG_SPL_DM_RTC=y
|
2022-09-21 14:21:44 +00:00
|
|
|
CONFIG_SCSI=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SANDBOX_SERIAL=y
|
|
|
|
CONFIG_SOUND=y
|
|
|
|
CONFIG_SOUND_SANDBOX=y
|
|
|
|
CONFIG_SOC_DEVICE=y
|
|
|
|
CONFIG_SANDBOX_SPI=y
|
|
|
|
CONFIG_SPMI=y
|
|
|
|
CONFIG_SPMI_SANDBOX=y
|
|
|
|
CONFIG_SYSINFO=y
|
|
|
|
CONFIG_SYSINFO_SANDBOX=y
|
2021-04-20 14:50:58 +00:00
|
|
|
CONFIG_SYSINFO_GPIO=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_SYSRESET=y
|
|
|
|
CONFIG_SPL_SYSRESET=y
|
2022-09-06 11:30:35 +00:00
|
|
|
CONFIG_DM_THERMAL=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_TIMER=y
|
2023-10-14 20:48:00 +00:00
|
|
|
CONFIG_SPL_TIMER=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_TIMER_EARLY=y
|
|
|
|
CONFIG_SANDBOX_TIMER=y
|
|
|
|
CONFIG_USB=y
|
2023-09-01 09:49:49 +00:00
|
|
|
CONFIG_DM_USB_GADGET=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_USB_EMUL=y
|
|
|
|
CONFIG_USB_KEYBOARD=y
|
2022-10-18 13:46:31 +00:00
|
|
|
CONFIG_VIDEO=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_CONSOLE_ROTATION=y
|
|
|
|
CONFIG_CONSOLE_TRUETYPE=y
|
|
|
|
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
|
2021-11-08 03:59:43 +00:00
|
|
|
CONFIG_I2C_EDID=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_VIDEO_SANDBOX_SDL=y
|
|
|
|
CONFIG_OSD=y
|
|
|
|
CONFIG_SANDBOX_OSD=y
|
|
|
|
CONFIG_FS_CBFS=y
|
|
|
|
CONFIG_FS_CRAMFS=y
|
|
|
|
# CONFIG_SPL_USE_TINY_PRINTF is not set
|
|
|
|
CONFIG_CMD_DHRYSTONE=y
|
|
|
|
CONFIG_RSA_VERIFY_WITH_PKEY=y
|
|
|
|
CONFIG_TPM=y
|
2023-01-12 16:27:46 +00:00
|
|
|
CONFIG_ZSTD=y
|
2023-10-14 20:48:04 +00:00
|
|
|
CONFIG_SPL_LZMA=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_ERRNO_STR=y
|
2023-08-22 17:39:57 +00:00
|
|
|
CONFIG_EFI_CAPSULE_ON_DISK=y
|
|
|
|
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
|
2021-03-15 04:25:32 +00:00
|
|
|
CONFIG_UNIT_TEST=y
|
|
|
|
CONFIG_SPL_UNIT_TEST=y
|
|
|
|
CONFIG_UT_TIME=y
|
|
|
|
CONFIG_UT_DM=y
|