u-boot/drivers/net/fm/Makefile

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powerpc/85xx: Add support for FMan ethernet in Independent mode The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-13 13:37:44 +00:00
#
# Copyright 2009-2011 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
powerpc/85xx: Add support for FMan ethernet in Independent mode The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-13 13:37:44 +00:00
#
obj-y += dtsec.o
obj-y += eth.o
obj-y += fm.o
obj-y += init.o
obj-y += tgec.o
obj-y += tgec_phy.o
powerpc/85xx: Add support for FMan ethernet in Independent mode The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-13 13:37:44 +00:00
# Soc have FMAN v3 with mEMAC
obj-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
obj-$(CONFIG_SYS_FMAN_V3) += memac.o
powerpc/85xx: Add support for FMan ethernet in Independent mode The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-13 13:37:44 +00:00
# SoC specific SERDES support
obj-$(CONFIG_P1017) += p1023.o
obj-$(CONFIG_P1023) += p1023.o
powerpc/85xx: Add support for FMan ethernet in Independent mode The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-04-13 13:37:44 +00:00
# The P204x, P304x, and P5020 are the same
obj-$(CONFIG_PPC_P2041) += p5020.o
obj-$(CONFIG_PPC_P3041) += p5020.o
obj-$(CONFIG_PPC_P4080) += p4080.o
obj-$(CONFIG_PPC_P5020) += p5020.o
obj-$(CONFIG_PPC_P5040) += p5040.o
obj-$(CONFIG_PPC_T1040) += t1040.o
obj-$(CONFIG_PPC_T1042) += t1040.o
obj-$(CONFIG_PPC_T1020) += t1040.o
obj-$(CONFIG_PPC_T1022) += t1040.o
powerpc/mpc85xx: Add T1024/T1023 SoC support Add support for Freescale T1024/T1023 SoC. The T1024 SoC includes the following function and features: - Two 64-bit Power architecture e5500 cores, up to 1.4GHz - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC) - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI) - High-speed peripheral interfaces - Three PCI Express 2.0 controllers - Additional peripheral interfaces - One SATA 2.0 controller - Two USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/eSDHC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Two 8-channel DMA engines - Multicore programmable interrupt controller (PIC) - LCD interface (DIU) with 12 bit dual data rate - QUICC Engine block supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T1024 and T1023: Feature T1024 T1023 QUICC Engine: yes no DIU: yes no Deep Sleep: yes no I2C controller: 4 3 DDR: 64-bit 32-bit IFC: 32-bit 28-bit Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
2014-11-24 09:11:54 +00:00
obj-$(CONFIG_PPC_T1023) += t1024.o
obj-$(CONFIG_PPC_T1024) += t1024.o
powerpc/mpc85xx: Add T2080/T2081 SoC support Add support for Freescale T2080/T2081 SoC. T2080 includes the following functions and features: - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz - 2MB L2 cache and 512KB CoreNet platform cache (CPC) - Hierarchical interconnect fabric - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving - Data Path Acceleration Architecture (DPAA) incorporating acceleration - 16 SerDes lanes up to 10.3125 GHz - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs) - High-speed peripheral interfaces - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz - Additional peripheral interfaces - Two serial ATA (SATA 2.0) controllers - Two high-speed USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Three eight-channel DMA engines - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T2080 and T2081: Feature T2080 T2081 1G Ethernet numbers: 8 6 10G Ethernet numbers: 4 2 SerDes lanes: 16 8 Serial RapidIO,RMan: 2 no SATA Controller: 2 no Aurora: yes no SoC Package: 896-pins 780-pins Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
2013-11-22 09:39:10 +00:00
obj-$(CONFIG_PPC_T2080) += t2080.o
obj-$(CONFIG_PPC_T2081) += t2080.o
obj-$(CONFIG_PPC_T4240) += t4240.o
obj-$(CONFIG_PPC_T4160) += t4240.o
obj-$(CONFIG_PPC_T4080) += t4240.o
obj-$(CONFIG_PPC_B4420) += b4860.o
obj-$(CONFIG_PPC_B4860) += b4860.o