u-boot/arch/arm/include/asm/arch-tegra210/clock.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2010-2015
 * NVIDIA Corporation <www.nvidia.com>
 */

/* Tegra210 clock control definitions */

#ifndef _TEGRA210_CLOCK_H_
#define _TEGRA210_CLOCK_H_

#include <asm/arch-tegra/clock.h>

/* CLK_RST_CONTROLLER_OSC_CTRL_0 */
#define OSC_FREQ_SHIFT          28
#define OSC_FREQ_MASK           (0xF << OSC_FREQ_SHIFT)

/* PLL bits that differ from generic clk_rst.h */
#define PLLC_RESET		30
#define PLLC_IDDQ		27
#define PLLD_ENABLE_CLK		21
#define PLLD_EN_LCKDET		28

int tegra_plle_enable(void);

#endif	/* _TEGRA210_CLOCK_H_ */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
ARM: Tegra210: Add SoC code/include files for T210 All based off of Tegra124. As a Tegra210 board is brought up, these may change a bit to match the HW more closely, but probably 90% of this is identical to T124. Note that since T210 is a 64-bit build, it has no SPL component, and hence no cpu.c for Tegra210. Signed-off-by: Tom Warren <twarren@nvidia.com> 2015-02-02 20:22:29 +00:00			`/*`
			`* (C) Copyright 2010-2015`
			`* NVIDIA Corporation <www.nvidia.com>`
			`*/`

			`/* Tegra210 clock control definitions */`

			`#ifndef _TEGRA210_CLOCK_H_`
			`#define _TEGRA210_CLOCK_H_`

			`#include <asm/arch-tegra/clock.h>`

			`/* CLK_RST_CONTROLLER_OSC_CTRL_0 */`
			`#define OSC_FREQ_SHIFT 28`
			`#define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT)`

			`/* PLL bits that differ from generic clk_rst.h */`
			`#define PLLC_RESET 30`
			`#define PLLC_IDDQ 27`
			`#define PLLD_ENABLE_CLK 21`
			`#define PLLD_EN_LCKDET 28`

			`int tegra_plle_enable(void);`

			`#endif /* _TEGRA210_CLOCK_H_ */`