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u-boot/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
/* SPDX-License-Identifier: GPL-2.0+ */
am33xx: refactor am33xx clocks and add ti814x support Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-15 10:07:04 +00:00
/*
* hardware_am33xx.h
*
* AM33xx hardware specific header
*
* Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
*/
#ifndef __AM33XX_HARDWARE_AM33XX_H
#define __AM33XX_HARDWARE_AM33XX_H
am33xx: add ti814x specific register definitions Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-03-15 10:07:06 +00:00
/* Module base addresses */
/* UART Base Address */
#define UART0_BASE 0x44E09000
Add UART base addresses for additional UARTs UARTs 1 through 5 were missing in the code - added. Also pick the default according to the configuration setting for the console index. Signed-off-by: Ronald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>
2017-10-25 13:46:53 +00:00
#define UART1_BASE 0x48022000
#define UART2_BASE 0x48024000
#define UART3_BASE 0x481A6000
#define UART4_BASE 0x481A8000
#define UART5_BASE 0x481AA000
am33xx: add ti814x specific register definitions Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-03-15 10:07:06 +00:00
/* GPIO Base address */
#define GPIO2_BASE 0x481AC000
/* Watchdog Timer */
#define WDT_BASE 0x44E35000
/* Control Module Base Address */
#define CTRL_BASE 0x44E10000
#define CTRL_DEVICE_BASE 0x44E10600
/* PRCM Base Address */
#define PRCM_BASE 0x44E00000
ARM: AM43xx: Add header files Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-07-30 06:06:28 +00:00
#define CM_PER 0x44E00000
#define CM_WKUP 0x44E00400
ARM: AM43xx: Update the base addresses of modules PRCM, timer base addresses and offsets are different from AM33xx. Updating the same. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-12-10 09:32:11 +00:00
#define CM_DPLL 0x44E00500
#define CM_RTC 0x44E00800
ARM: AM43xx: Add header files Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-07-30 06:06:28 +00:00
#define PRM_RSTCTRL (PRCM_BASE + 0x0F00)
#define PRM_RSTST (PRM_RSTCTRL + 8)
am33xx: add ti814x specific register definitions Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-03-15 10:07:06 +00:00
am33xx: refactor am33xx clocks and add ti814x support Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-15 10:07:04 +00:00
/* VTP Base address */
#define VTP0_CTRL_ADDR 0x44E10E0C
Add TI816X support Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-02 10:05:59 +00:00
#define VTP1_CTRL_ADDR 0x48140E10
arm: am437x: Enable hardware leveling for EMIF Switch to using hardware leveling for certain parameters on the EMIF rather than using precalculated values. Doing this also means we have a common place now between am437x and am335x for setting emif_sdram_ref_ctrl with a value for the correct delay length. Tested-by: Felipe Balbi <balbi@ti.com> Tested-by: Tom Rini <trini@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-12-22 22:26:11 +00:00
#define PRM_DEVICE_INST 0x44E00F00
am33xx: refactor am33xx clocks and add ti814x support Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-15 10:07:04 +00:00
/* DDR Base address */
#define DDR_PHY_CMD_ADDR 0x44E12000
#define DDR_PHY_DATA_ADDR 0x44E120C8
Add TI816X support Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-02 10:05:59 +00:00
#define DDR_PHY_CMD_ADDR2 0x47C0C800
#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
am33xx: refactor am33xx clocks and add ti814x support Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-15 10:07:04 +00:00
#define DDR_DATA_REGS_NR 2
Add TI816X support Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
2013-07-02 10:05:59 +00:00
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
am33xx: add ti814x specific register definitions Support the ti814x specific register definitions within arch-am33xx. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
2013-03-15 10:07:06 +00:00
/* CPSW Config space */
#define CPSW_MDIO_BASE 0x4A101000
/* RTC base address */
#define RTC_BASE 0x44E3E000
ARM: AM43xx: Add header files Adding the following data: -> Prcm structure -> Base addresses -> Pin mux structure. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2013-07-30 06:06:28 +00:00
/* OTG */
#define USB0_OTG_BASE 0x47401000
#define USB1_OTG_BASE 0x47401800
arm, am335x: add some missing registers and defines for lcd and epwm support - add missing register defines in struct cm_perpl epwmss0clkctrl epwmss2clkctrl lcdcclkstctrl - add missing register defines in struct cm_dpll clklcdcpixelclk - add struct pwmss_regs - add struct pwmss_ecap_regs - add LCD Controller base LCD_CNTL_BASE - add PWM0 controller base PWMSS0_BASE Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2013-08-19 14:38:57 +00:00
/* LCD Controller */
#define LCD_CNTL_BASE 0x4830E000
/* PWMSS */
#define PWMSS0_BASE 0x48300000
#define AM33XX_ECAP0_BASE 0x48300100
ARM: Add register defines for am33xx ePWM registers Register definitions needed for configuring the ePWM module. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2016-09-16 10:21:39 +00:00
#define AM33XX_EPWM_BASE 0x48300200
arm, am335x: add some missing registers and defines for lcd and epwm support - add missing register defines in struct cm_perpl epwmss0clkctrl epwmss2clkctrl lcdcclkstctrl - add missing register defines in struct cm_dpll clklcdcpixelclk - add struct pwmss_regs - add struct pwmss_ecap_regs - add LCD Controller base LCD_CNTL_BASE - add PWM0 controller base PWMSS0_BASE Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
2013-08-19 14:38:57 +00:00
am33xx: refactor am33xx clocks and add ti814x support Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by: Matt Porter <mporter@ti.com>
2013-03-15 10:07:04 +00:00
#endif /* __AM33XX_HARDWARE_AM33XX_H */
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