2013-04-16 23:42:44 +00:00
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/*
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* (C) Copyright 2013 Atmel Corporation.
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* Josh Wu <josh.wu@atmel.com>
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*
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* Configuation settings for the AT91SAM9N12-EK boards.
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2013-04-16 23:42:44 +00:00
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*/
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#ifndef __AT91SAM9N12_CONFIG_H_
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#define __AT91SAM9N12_CONFIG_H_
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/*
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* SoC must be defined first, before hardware.h is included.
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* In this case SoC is defined in boards.cfg.
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*/
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#include <asm/hardware.h>
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#define CONFIG_SYS_TEXT_BASE 0x26f00000
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/* ARM asynchronous clock */
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
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#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */
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/* Misc CPU related */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* LCD */
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#define LCD_BPP LCD_COLOR16
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#define LCD_OUTPUT_BPP 24
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#define CONFIG_LCD_LOGO
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#define CONFIG_LCD_INFO
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#define CONFIG_LCD_INFO_BELOW_LOGO
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#define CONFIG_ATMEL_HLCD
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#define CONFIG_ATMEL_LCD_RGB565
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE 0x08000000
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/*
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* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
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* leaving the correct space for initial global data structure above
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* that address while providing maximum stack area below.
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*/
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# define CONFIG_SYS_INIT_SP_ADDR \
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2017-04-18 06:54:51 +00:00
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(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
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2013-04-16 23:42:44 +00:00
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/* DataFlash */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#endif
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/* NAND flash */
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_ATMEL
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
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#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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2013-11-29 11:13:45 +00:00
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#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4)
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#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)
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2017-07-29 01:31:42 +00:00
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#endif
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2013-04-16 23:42:44 +00:00
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/* PMECC & PMERRLOC */
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#define CONFIG_ATMEL_NAND_HWECC
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#define CONFIG_ATMEL_NAND_HW_PMECC
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#define CONFIG_PMECC_CAP 2
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#define CONFIG_PMECC_SECTOR_SIZE 512
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#define CONFIG_PMECC_INDEX_TABLE_OFFSET 0x8000
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2013-06-26 02:48:53 +00:00
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2013-04-16 23:42:44 +00:00
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define MTDIDS_DEFAULT "nand0=atmel_nand"
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#define MTDPARTS_DEFAULT \
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"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
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"256k(env),256k(env_redundant),256k(spare)," \
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"512k(dtb),6M(kernel)ro,-(rootfs)"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"console=console=ttyS0,115200\0" \
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"mtdparts="MTDPARTS_DEFAULT"\0" \
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"bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
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"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
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2013-04-24 02:46:18 +00:00
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/* Ethernet */
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#define CONFIG_KS8851_MLL
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#define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
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2013-04-16 23:42:44 +00:00
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#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END 0x26e00000
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2013-10-21 08:13:59 +00:00
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/* USB host */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_ATMEL
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2013-10-21 08:14:00 +00:00
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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2013-10-21 08:13:59 +00:00
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#endif
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2013-04-16 23:42:44 +00:00
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#ifdef CONFIG_SYS_USE_SPIFLASH
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/* bootstrap + u-boot + env + linux in dataflash on CS0 */
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#define CONFIG_ENV_OFFSET 0x5000
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#define CONFIG_ENV_SIZE 0x3000
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#define CONFIG_ENV_SECT_SIZE 0x1000
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#define CONFIG_BOOTCOMMAND \
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"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
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"sf probe 0; sf read 0x22000000 0x100000 0x300000; " \
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"bootm 0x22000000"
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#elif defined(CONFIG_SYS_USE_NANDFLASH)
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/* bootstrap + u-boot + env + linux in nandflash */
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2017-04-18 06:54:51 +00:00
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#define CONFIG_ENV_OFFSET 0x120000
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2013-04-16 23:42:44 +00:00
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#define CONFIG_ENV_OFFSET_REDUND 0x100000
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#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
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#define CONFIG_BOOTCOMMAND \
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"setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \
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"nand read 0x21000000 0x180000 0x080000;" \
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"nand read 0x22000000 0x200000 0x400000;" \
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"bootm 0x22000000 - 0x21000000"
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#else /* CONFIG_SYS_USE_MMC */
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/* bootstrap + u-boot + env + linux in mmc */
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2015-03-24 09:07:22 +00:00
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#ifdef CONFIG_ENV_IS_IN_MMC
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/* Use raw reserved sectors to save environment */
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2013-04-16 23:42:44 +00:00
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#define CONFIG_ENV_OFFSET 0x2000
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#define CONFIG_ENV_SIZE 0x1000
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#define CONFIG_SYS_MMC_ENV_DEV 0
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2015-03-24 09:07:22 +00:00
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#else
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/* Use file in FAT file to save environment */
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#define CONFIG_ENV_SIZE 0x4000
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#endif
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2013-04-16 23:42:44 +00:00
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#define CONFIG_BOOTCOMMAND \
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"setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \
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"fatload mmc 0:1 0x21000000 dtb;" \
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"fatload mmc 0:1 0x22000000 uImage;" \
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"bootm 0x22000000 - 0x21000000"
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#endif
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_AUTO_COMPLETE
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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2015-03-27 06:23:36 +00:00
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/* SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x300000
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#define CONFIG_SPL_MAX_SIZE 0x6000
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#define CONFIG_SPL_STACK 0x308000
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#define CONFIG_SPL_BSS_START_ADDR 0x20000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
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#define CONFIG_SYS_MONITOR_LEN (512 << 10)
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#define CONFIG_SYS_MASTER_CLOCK 132096000
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#define CONFIG_SYS_AT91_PLLA 0x20953f03
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#define CONFIG_SYS_MCKR 0x1301
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#define CONFIG_SYS_MCKR_CSS 0x1302
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#ifdef CONFIG_SYS_USE_MMC
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#elif CONFIG_SYS_USE_NANDFLASH
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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#define CONFIG_SYS_NAND_OOBSIZE 64
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#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
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#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
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#elif CONFIG_SYS_USE_SPIFLASH
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#define CONFIG_SPL_SPI_LOAD
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
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#endif
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2013-04-16 23:42:44 +00:00
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#endif
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