2019-10-07 13:56:36 +00:00
|
|
|
/* SPDX-License-Identifier: BSD-3-Clause */
|
2021-05-11 15:22:11 +00:00
|
|
|
/*
|
|
|
|
* Cadence DDR Driver
|
|
|
|
*
|
|
|
|
* Copyright (C) 2012-2021 Cadence Design Systems, Inc.
|
|
|
|
* Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
|
2019-10-07 13:56:36 +00:00
|
|
|
*/
|
2021-05-11 15:22:11 +00:00
|
|
|
|
2019-10-07 13:56:36 +00:00
|
|
|
#ifndef LPDDR4_STRUCTS_IF_H
|
|
|
|
#define LPDDR4_STRUCTS_IF_H
|
|
|
|
|
|
|
|
#include <linux/types.h>
|
|
|
|
#include "lpddr4_if.h"
|
|
|
|
|
2021-05-11 15:22:11 +00:00
|
|
|
struct lpddr4_config_s {
|
|
|
|
struct lpddr4_ctlregs_s *ctlbase;
|
2019-10-07 13:56:36 +00:00
|
|
|
lpddr4_infocallback infohandler;
|
|
|
|
lpddr4_ctlcallback ctlinterrupthandler;
|
|
|
|
lpddr4_phyindepcallback phyindepinterrupthandler;
|
|
|
|
};
|
|
|
|
|
2021-05-11 15:22:11 +00:00
|
|
|
struct lpddr4_privatedata_s {
|
|
|
|
struct lpddr4_ctlregs_s *ctlbase;
|
2019-10-07 13:56:36 +00:00
|
|
|
lpddr4_infocallback infohandler;
|
|
|
|
lpddr4_ctlcallback ctlinterrupthandler;
|
|
|
|
lpddr4_phyindepcallback phyindepinterrupthandler;
|
|
|
|
};
|
|
|
|
|
2021-05-11 15:22:11 +00:00
|
|
|
struct lpddr4_debuginfo_s {
|
|
|
|
u8 pllerror;
|
|
|
|
u8 iocaliberror;
|
|
|
|
u8 rxoffseterror;
|
|
|
|
u8 catraingerror;
|
|
|
|
u8 wrlvlerror;
|
|
|
|
u8 gatelvlerror;
|
|
|
|
u8 readlvlerror;
|
|
|
|
u8 dqtrainingerror;
|
2019-10-07 13:56:36 +00:00
|
|
|
};
|
|
|
|
|
2021-05-11 15:22:11 +00:00
|
|
|
struct lpddr4_fspmoderegs_s {
|
|
|
|
u8 mr1data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr2data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr3data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr11data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr12data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr13data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr14data_fn[LPDDR4_INTR_MAX_CS];
|
|
|
|
u8 mr22data_fn[LPDDR4_INTR_MAX_CS];
|
2019-10-07 13:56:36 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
#endif /* LPDDR4_STRUCTS_IF_H */
|