2020-05-03 14:41:14 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2020 NXP
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*/
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2021-07-20 18:15:28 +00:00
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#define LOG_CATEGORY UCLASS_ETH_PHY
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2020-05-03 14:41:14 +00:00
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#include <common.h>
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#include <dm.h>
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2021-07-20 18:09:52 +00:00
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#include <log.h>
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2020-05-03 14:41:14 +00:00
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#include <net.h>
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2021-07-20 18:09:51 +00:00
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#include <asm-generic/gpio.h>
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2021-07-20 18:09:52 +00:00
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#include <dm/device_compat.h>
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2020-05-03 14:41:14 +00:00
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#include <dm/device-internal.h>
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#include <dm/uclass-internal.h>
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#include <dm/lists.h>
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2021-07-20 18:09:51 +00:00
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#include <linux/delay.h>
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2020-05-03 14:41:14 +00:00
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struct eth_phy_device_priv {
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struct mii_dev *mdio_bus;
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2021-07-20 18:09:51 +00:00
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struct gpio_desc reset_gpio;
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u32 reset_assert_delay;
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u32 reset_deassert_delay;
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2020-05-03 14:41:14 +00:00
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};
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int eth_phy_binds_nodes(struct udevice *eth_dev)
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{
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ofnode mdio_node, phy_node;
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const char *node_name;
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int ret;
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2021-07-20 18:09:53 +00:00
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/* search a subnode named "mdio.*" */
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dev_for_each_subnode(mdio_node, eth_dev) {
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node_name = ofnode_get_name(mdio_node);
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if (!strncmp(node_name, "mdio", 4))
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break;
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}
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2020-05-03 14:41:14 +00:00
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if (!ofnode_valid(mdio_node)) {
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dev_dbg(eth_dev, "%s: %s mdio subnode not found!\n", __func__,
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eth_dev->name);
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2020-05-03 14:41:14 +00:00
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return -ENXIO;
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}
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2021-07-20 18:09:53 +00:00
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dev_dbg(eth_dev, "%s: %s subnode found!\n", __func__, node_name);
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2020-05-03 14:41:14 +00:00
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ofnode_for_each_subnode(phy_node, mdio_node) {
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node_name = ofnode_get_name(phy_node);
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2021-07-20 18:09:52 +00:00
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dev_dbg(eth_dev, "* Found child node: '%s'\n", node_name);
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2020-05-03 14:41:14 +00:00
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ret = device_bind_driver_to_node(eth_dev,
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"eth_phy_generic_drv",
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node_name, phy_node, NULL);
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if (ret) {
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dev_dbg(eth_dev, " - Eth phy binding error: %d\n", ret);
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2020-05-03 14:41:14 +00:00
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continue;
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}
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2021-07-20 18:09:52 +00:00
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dev_dbg(eth_dev, " - bound phy device: '%s'\n", node_name);
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2020-05-03 14:41:14 +00:00
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}
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return 0;
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}
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int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus)
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{
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struct udevice *dev;
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struct eth_phy_device_priv *uc_priv;
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for (uclass_first_device(UCLASS_ETH_PHY, &dev); dev;
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uclass_next_device(&dev)) {
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if (dev->parent == eth_dev) {
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2020-12-23 02:30:28 +00:00
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uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(dev));
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2020-05-03 14:41:14 +00:00
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if (!uc_priv->mdio_bus)
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uc_priv->mdio_bus = mdio_bus;
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}
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}
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return 0;
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}
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struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev)
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{
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int ret;
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struct udevice *phy_dev;
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struct eth_phy_device_priv *uc_priv;
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/* Will probe the parent of phy device, then phy device */
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ret = uclass_get_device_by_phandle(UCLASS_ETH_PHY, eth_dev,
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"phy-handle", &phy_dev);
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if (!ret) {
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if (eth_dev != phy_dev->parent) {
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/*
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* phy_dev is shared and controlled by
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* other eth controller
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*/
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uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(phy_dev));
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if (uc_priv->mdio_bus)
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log_notice("Get shared mii bus on %s\n", eth_dev->name);
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else
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log_notice("Can't get shared mii bus on %s\n", eth_dev->name);
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2020-05-03 14:41:14 +00:00
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return uc_priv->mdio_bus;
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}
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} else {
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log_notice("FEC: can't find phy-handle\n");
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2020-05-03 14:41:14 +00:00
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}
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return NULL;
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}
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int eth_phy_get_addr(struct udevice *dev)
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{
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struct ofnode_phandle_args phandle_args;
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int reg;
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if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
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&phandle_args)) {
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dev_dbg(dev, "Failed to find phy-handle");
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2020-05-03 14:41:14 +00:00
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return -ENODEV;
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}
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reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
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return reg;
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}
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2021-07-20 18:09:51 +00:00
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/* parsing generic properties of devicetree/bindings/net/ethernet-phy.yaml */
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static int eth_phy_of_to_plat(struct udevice *dev)
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{
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struct eth_phy_device_priv *uc_priv = dev_get_uclass_priv(dev);
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int ret;
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if (!CONFIG_IS_ENABLED(DM_GPIO))
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return 0;
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/* search "reset-gpios" in phy node */
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ret = gpio_request_by_name(dev, "reset-gpios", 0,
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&uc_priv->reset_gpio,
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GPIOD_IS_OUT);
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2021-11-13 02:23:11 +00:00
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if (ret && ret != -ENOENT)
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return ret;
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uc_priv->reset_assert_delay = dev_read_u32_default(dev, "reset-assert-us", 0);
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uc_priv->reset_deassert_delay = dev_read_u32_default(dev, "reset-deassert-us", 0);
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return 0;
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}
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void eth_phy_reset(struct udevice *dev, int value)
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{
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struct eth_phy_device_priv *uc_priv = dev_get_uclass_priv(dev);
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u32 delay;
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if (!CONFIG_IS_ENABLED(DM_GPIO))
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return;
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if (!dm_gpio_is_valid(&uc_priv->reset_gpio))
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return;
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dm_gpio_set_value(&uc_priv->reset_gpio, value);
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delay = value ? uc_priv->reset_assert_delay : uc_priv->reset_deassert_delay;
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if (delay)
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udelay(delay);
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}
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static int eth_phy_pre_probe(struct udevice *dev)
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{
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/* Assert and deassert the reset signal */
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eth_phy_reset(dev, 1);
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eth_phy_reset(dev, 0);
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return 0;
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}
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2020-05-03 14:41:14 +00:00
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UCLASS_DRIVER(eth_phy_generic) = {
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.id = UCLASS_ETH_PHY,
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.name = "eth_phy_generic",
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2020-12-03 23:55:17 +00:00
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.per_device_auto = sizeof(struct eth_phy_device_priv),
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.pre_probe = eth_phy_pre_probe,
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};
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U_BOOT_DRIVER(eth_phy_generic_drv) = {
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.name = "eth_phy_generic_drv",
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.id = UCLASS_ETH_PHY,
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.of_to_plat = eth_phy_of_to_plat,
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};
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