mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-07 05:34:28 +00:00
228 lines
13 KiB
Text
228 lines
13 KiB
Text
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Introduction:
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-------------
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The J721e family of SoCs are part of K3 Multicore SoC architecture platform
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targeting automotive applications. They are designed as a low power, high
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performance and highly integrated device architecture, adding significant
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enhancement on processing power, graphics capability, video and imaging
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processing, virtualization and coherent memory support.
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The device is partitioned into three functional domains, each containing
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specific processing cores and peripherals:
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1. Wake-up (WKUP) domain:
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- Device Management and Security Controller (DMSC)
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2. Microcontroller (MCU) domain:
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- Dual Core ARM Cortex-R5F processor
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3. MAIN domain:
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- Dual core 64-bit ARM Cortex-A72
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- 2 x Dual cortex ARM Cortex-R5 subsystem
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- 2 x C66x Digital signal processor sub system
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- C71x Digital signal processor sub-system with MMA.
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More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
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Boot Flow:
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----------
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Boot flow is similar to that of AM65x SoC and extending it with remoteproc
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support. Below is the pictorial representation of boot flow:
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+------------------------------------------------------------------------+-----------------------+
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| DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
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+------------------------------------------------------------------------+-----------------------+
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| +--------+ | | | |
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| | Reset | | | | |
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| +--------+ | | | |
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| : | | | |
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| +--------+ | +-----------+ | | |
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| | *ROM* |----------|-->| Reset rls | | | |
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| +--------+ | +-----------+ | | |
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| | | | : | | |
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| | ROM | | : | | |
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| |services| | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 ROM* | | | |
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| | | | +-------------+ | | |
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| | |<---------|---|Load and auth| | | |
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| | | | | tiboot3.bin | | | |
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| | | | +-------------+ | | |
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| | | | : | | |
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| | | | : | | |
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| | | | : | | |
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| | | | +-------------+ | | |
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| | | | | *R5 SPL* | | | |
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| | | | +-------------+ | | |
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| | | | | Load | | | |
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| | | | | sysfw.itb | | | |
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| | Start | | +-------------+ | | |
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| | System |<---------|---| Start | | | |
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| |Firmware| | | SYSFW | | | |
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| +--------+ | +-------------+ | | |
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| : | | | | | |
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| +---------+ | | Load | | | |
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| | *SYSFW* | | | system | | | |
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| +---------+ | | Config data | | | |
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| | |<--------|---| | | | |
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| | | | +-------------+ | | |
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| | | | | DDR | | | |
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| | | | | config | | | |
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| | | | +-------------+ | | |
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| | | | | Load | | | |
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| | | | | tispl.bin | | | |
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| | | | +-------------+ | | |
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| | | | | Load R5 | | | |
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| | | | | firmware | | | |
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| | | | +-------------+ | | |
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| | |<--------|---| Start A72 | | | |
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| | | | | and jump to | | | |
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| | | | | next image | | | |
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| | | | +-------------+ | | |
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| | | | | +-----------+ | |
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| | |---------|-----------------------|---->| Reset rls | | |
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| | | | | +-----------+ | |
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| | DMSC | | | : | |
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| |Services | | | +-----------+ | |
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| | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *A72 SPL* | | |
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| | | | | +-----------+ | |
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| | | | | | Load | | |
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| | | | | | u-boot.img| | |
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| | | | | +-----------+ | |
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| | | | | : | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|---->| *U-Boot* | | |
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| | | | | +-----------+ | |
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| | | | | | prompt | | |
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| | | | | +-----------+ | |
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| | | | | | Load R5 | | |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
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| | | | | | Load C6 | | +-----------+ |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
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| | | | | | Load C7 | | +-----------+ |
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| | | | | | Firmware | | |
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| | | | | +-----------+ | |
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| | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
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| | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
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| +---------+ | | | +-----------+ |
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+------------------------------------------------------------------------+-----------------------+
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- Here DMSC acts as master and provides all the critical services. R5/A72
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requests DMSC to get these services done as shown in the above diagram.
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Sources:
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--------
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1. SYSFW:
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Tree: git://git.ti.com/processor-firmware/system-firmware-image-gen.git
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Branch: master
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2. ATF:
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Tree: https://github.com/ARM-software/arm-trusted-firmware.git
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Branch: master
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3. OPTEE:
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Tree: https://github.com/OP-TEE/optee_os.git
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Branch: master
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4. U-Boot:
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Tree: https://gitlab.denx.de/u-boot/u-boot
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Branch: master
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Build procedure:
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----------------
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1. SYSFW:
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$ make CROSS_COMPILE=arm-linux-gnueabihf-
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2. ATF:
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$ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
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3. OPTEE:
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$ make PLATFORM=k3-j721e CFG_ARM64_core=y
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4. U-Boot:
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4.1. R5:
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$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
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$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
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4.2. A72:
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$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
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$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager.bin O=/tmp/a72
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Target Images
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--------------
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Copy the below images to an SD card and boot:
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- sysfw.itb from step 1
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- tiboot3.bin from step 4.1
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- tispl.bin, u-boot.img from 4.2
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Image formats:
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--------------
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- tiboot3.bin:
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+-----------------------+
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| X.509 |
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| Certificate |
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| +-------------------+ |
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| | R5 | |
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| | u-boot-spl.bin | |
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| +-------------------+ |
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| | FIT header | |
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| | +---------------+ | |
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| | | DTB 1...N | | |
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| | +---------------+ | |
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| +-------------------+ |
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+-----------------------+
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- tispl.bin
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+-----------------------+
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| FIT HEADER |
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| +-------------------+ |
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| | A72 ATF | |
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| +-------------------+ |
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| | A72 OPTEE | |
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| +-------------------+ |
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| | A72 SPL | |
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| +-------------------+ |
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| | SPL DTB 1...N | |
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| +-------------------+ |
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+-----------------------+
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- sysfw.itb
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+-----------------------+
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| FIT HEADER |
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| +-------------------+ |
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| | sysfw.bin | |
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| +-------------------+ |
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| | board config | |
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| +-------------------+ |
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| | PM config | |
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| +-------------------+ |
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| | RM config | |
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| +-------------------+ |
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| | Secure config | |
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| +-------------------+ |
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+-----------------------+
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