2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2016-07-04 17:58:24 +00:00
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/*
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* Copyright (c) 2015 Google, Inc
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <dt-structs.h>
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#include <ns16550.h>
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#include <serial.h>
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2019-03-28 03:01:23 +00:00
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#include <asm/arch-rockchip/clock.h>
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2016-07-04 17:58:24 +00:00
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2017-02-18 18:46:29 +00:00
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#if defined(CONFIG_ROCKCHIP_RK3188)
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struct rockchip_uart_platdata {
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struct dtd_rockchip_rk3188_uart dtplat;
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struct ns16550_platdata plat;
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};
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struct dtd_rockchip_rk3188_uart *dtplat, s_dtplat;
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#elif defined(CONFIG_ROCKCHIP_RK3288)
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2016-07-04 17:58:24 +00:00
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struct rockchip_uart_platdata {
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struct dtd_rockchip_rk3288_uart dtplat;
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struct ns16550_platdata plat;
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};
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struct dtd_rockchip_rk3288_uart *dtplat, s_dtplat;
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2017-02-18 18:46:29 +00:00
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#endif
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2016-07-04 17:58:24 +00:00
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static int rockchip_serial_probe(struct udevice *dev)
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{
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struct rockchip_uart_platdata *plat = dev_get_platdata(dev);
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/* Create some new platform data for the standard driver */
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plat->plat.base = plat->dtplat.reg[0];
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plat->plat.reg_shift = plat->dtplat.reg_shift;
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plat->plat.clock = plat->dtplat.clock_frequency;
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2017-01-18 07:05:49 +00:00
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plat->plat.fcr = UART_FCR_DEFVAL;
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2016-07-04 17:58:24 +00:00
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dev->platdata = &plat->plat;
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return ns16550_serial_probe(dev);
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}
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2017-02-18 18:46:29 +00:00
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U_BOOT_DRIVER(rockchip_rk3188_uart) = {
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.name = "rockchip_rk3188_uart",
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.id = UCLASS_SERIAL,
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.priv_auto_alloc_size = sizeof(struct NS16550),
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.platdata_auto_alloc_size = sizeof(struct rockchip_uart_platdata),
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.probe = rockchip_serial_probe,
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.ops = &ns16550_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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2016-07-04 17:58:24 +00:00
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U_BOOT_DRIVER(rockchip_rk3288_uart) = {
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.name = "rockchip_rk3288_uart",
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.id = UCLASS_SERIAL,
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.priv_auto_alloc_size = sizeof(struct NS16550),
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.platdata_auto_alloc_size = sizeof(struct rockchip_uart_platdata),
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.probe = rockchip_serial_probe,
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.ops = &ns16550_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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