2014-11-03 12:57:01 +00:00
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/*
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* Copyright (C) 2014 Soeren Moch <smoch@web.de>
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*
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* Configuration settings for the TBS2910 MatrixARM board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __TBS2910_CONFIG_H
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#define __TBS2910_CONFIG_H
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#include "mx6_common.h"
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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/* General configuration */
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#define CONFIG_MX6
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO_LATE
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#define CONFIG_SYS_THUMB_BUILD
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#define CONFIG_MACH_TYPE 3980
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_GENERIC_BOARD
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MXC_GPIO
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#define CONFIG_CMD_GPIO
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT "Matrix U-Boot> "
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_HZ 1000
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END \
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(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
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#define CONFIG_SYS_TEXT_BASE 0x80000000
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#define CONFIG_SYS_BOOTMAPSZ 0x6C000000
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#define CONFIG_SYS_LOAD_ADDR 0x10800000
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/* Serial console */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_CONS_INDEX 1
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/* *** Command definition *** */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_BMODE
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#define CONFIG_CMD_SETEXPR
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_CMD_TIME
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/* Filesystems / image support */
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_SUPPORT_RAW_INITRD
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#define CONFIG_FIT
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/* MMC */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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/* Ethernet */
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#define CONFIG_FEC_MXC
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 4
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ATHEROS
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/* Framebuffer */
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#define CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_IPUV3_CLK 260000000
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_CFB_CONSOLE_ANSI
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_IMX_HDMI
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#define CONFIG_IMX_VIDEO_SKIP
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#define CONFIG_CMD_HDMIDETECT
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#endif
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/* PCI */
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#define CONFIG_CMD_PCI
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCIE_IMX
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
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#endif
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/* SATA */
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#define CONFIG_CMD_SATA
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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#endif
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/* USB */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_USB_STORAGE
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2015-02-26 18:50:02 +00:00
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#define CONFIG_CMD_USB_MASS_STORAGE
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#ifdef CONFIG_CMD_USB_MASS_STORAGE
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#define CONFIG_CI_UDC
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#define CONFIG_USBD_HS
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_MASS_STORAGE
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET_VBUS_DRAW 0
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#define CONFIG_USBDOWNLOAD_GADGET
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#define CONFIG_G_DNL_VENDOR_NUM 0x0525
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#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
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#define CONFIG_G_DNL_MANUFACTURER "TBS"
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#endif /* CONFIG_CMD_USB_MASS_STORAGE */
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2014-11-03 12:57:01 +00:00
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#define CONFIG_USB_KEYBOARD
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#ifdef CONFIG_USB_KEYBOARD
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2014-11-27 20:21:44 +00:00
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
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2014-11-03 12:57:01 +00:00
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#define CONFIG_SYS_STDIO_DEREGISTER
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#define CONFIG_PREBOOT "if hdmidet; then usb start; fi"
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#endif /* CONFIG_USB_KEYBOARD */
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#endif /* CONFIG_CMD_USB */
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/* RTC */
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#define CONFIG_CMD_DATE
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#ifdef CONFIG_CMD_DATE
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#define CONFIG_CMD_I2C
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#define CONFIG_RTC_DS1307
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#define CONFIG_SYS_RTC_BUS_NUM 2
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#endif
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/* I2C */
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#define CONFIG_CMD_I2C
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#ifdef CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_I2C_EDID
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#endif
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/* Fuses */
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#define CONFIG_CMD_FUSE
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#ifdef CONFIG_CMD_FUSE
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#define CONFIG_MXC_OCOTP
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#endif
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#ifndef CONFIG_SYS_DCACHE_OFF
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#define CONFIG_CMD_CACHE
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#endif
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/* Flash and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 2
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#define CONFIG_SYS_MMC_ENV_PART 1
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET (384 * 1024)
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
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"bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
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"video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
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"bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
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"bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
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"${bootargs_mmc3}\0" \
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"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
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"rdinit=/sbin/init enable_wait_mode=off\0" \
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"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
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"mmc read 0x10800000 0x800 0x4000; bootm\0" \
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"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
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"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
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"run bootargs_upd; " \
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"bootm 0x10800000 0x10d00000\0" \
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"console=ttymxc0\0" \
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"fan=gpio set 92\0" \
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"stdin=serial,usbkbd\0" \
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"stdout=serial,vga\0" \
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"stderr=serial,vga\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc rescan; " \
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"if run bootcmd_up1; then " \
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"run bootcmd_up2; " \
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"else " \
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"run bootcmd_mmc; " \
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"fi"
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#endif /* __TBS2910_CONFIG_H * */
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