2020-04-04 13:21:26 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2018-01-07 19:17:23 +00:00
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/*
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* Copyright (C) 2016 Glider bvba
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7790_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7790_PD_CA15_CPU0 0
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#define R8A7790_PD_CA15_CPU1 1
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#define R8A7790_PD_CA15_CPU2 2
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#define R8A7790_PD_CA15_CPU3 3
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#define R8A7790_PD_CA7_CPU0 5
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#define R8A7790_PD_CA7_CPU1 6
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#define R8A7790_PD_CA7_CPU2 7
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#define R8A7790_PD_CA7_CPU3 8
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#define R8A7790_PD_CA15_SCU 12
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#define R8A7790_PD_SH_4A 16
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#define R8A7790_PD_RGX 20
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#define R8A7790_PD_CA7_SCU 21
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#define R8A7790_PD_IMP 24
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/* Always-on power area */
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#define R8A7790_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */
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