Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-11 23:47:24 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/arch/arm/dts/tegra20-harmony.dts

819 lines
20 KiB
Text
Raw Normal View History

tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
/dts-v1/;
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
#include <dt-bindings/input/input.h>
Tegra: fdt: Change /include/ to #include for C preprocessor dts Makefile has the arch & board include paths added to DTS_CPPFLAGS. This allows the use of '#include "xyz"' in the dts/dtsi file which helps the C preprocessor find common dtsi include files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-21 12:31:27 +00:00
#include "tegra20.dtsi"
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
/ {
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-08-31 08:30:00 +00:00
model = "NVIDIA Tegra20 Harmony evaluation board";
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
compatible = "nvidia,harmony", "nvidia,tegra20";
tegra: dts: Add serial port details Some Tegra device tree files do not include information about the serial ports. Add this and also add information about the input clock speed. The console alias needs to be set up to indicate which port is used for the console. Also add a binding file since this is missing. Series-changes; 5 - Add full serial port nodes from Linux tree (commit fc9d4dbe) - Use /chosen/stdout-path instead of /aliases/console to specify the console Signed-off-by: Simon Glass <sjg@chromium.org>
2014-09-04 22:27:35 +00:00
chosen {
stdout-path = &uartd;
};
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
aliases {
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
rtc0 = "/i2c@7000d000/tps6586x@34";
rtc1 = "/rtc@7000e000";
serial0 = &uartd;
ARM: tegra: fix USB controller aliases Some boards have a different set of USB controllers enabled in DT than the set referenced by /alias entries. This patch fixes that. For example, this avoids the following message while booting on Ventana, which is caused by the fact that the USB0 controller had no alias, and defaulted to wanting a sequence number of 0, which was later explicitly requested by the alias for USB controller 2. USB2: Device 'usb@c5008000': seq 0 is in use by 'usb@c5000000' This didn't affect USB operation in any way though. Related, there's no need for the USB controller aliases to have an order that's different from the HW order, so re-order any aliases to match the HW ordering. This has the benefit that since USB controller 0 is the only one that supports device-mode in HW, and U-Boot only supports enabling device move on controller 0, there's now good synergy in the ordering! For Tegra20, that's not relevant at present since USB device mode doesn't work correctly on that SoC, but it will save some head-scratching later. This patch doesn't fix the colibri_t20 board, even though it has the same issue, since Marcel already sent a patch for that. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Harmony and Ventana
2016-09-15 18:19:38 +00:00
usb0 = "/usb@c5000000";
ARM: tegra: Harmony: enable ULPI USB port The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-12 09:45:48 +00:00
usb1 = "/usb@c5004000";
ARM: tegra: fix USB controller aliases Some boards have a different set of USB controllers enabled in DT than the set referenced by /alias entries. This patch fixes that. For example, this avoids the following message while booting on Ventana, which is caused by the fact that the USB0 controller had no alias, and defaulted to wanting a sequence number of 0, which was later explicitly requested by the alias for USB controller 2. USB2: Device 'usb@c5008000': seq 0 is in use by 'usb@c5000000' This didn't affect USB operation in any way though. Related, there's no need for the USB controller aliases to have an order that's different from the HW order, so re-order any aliases to match the HW ordering. This has the benefit that since USB controller 0 is the only one that supports device-mode in HW, and U-Boot only supports enabling device move on controller 0, there's now good synergy in the ordering! For Tegra20, that's not relevant at present since USB device mode doesn't work correctly on that SoC, but it will save some head-scratching later. This patch doesn't fix the colibri_t20 board, even though it has the same issue, since Marcel already sent a patch for that. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Harmony and Ventana
2016-09-15 18:19:38 +00:00
usb2 = "/usb@c5008000";
mmc: tegra: use correct alias for SDHCI/MMC nodes The Tegra MMC driver currently honors "sdhci" entries in /aliases. The MMC core however uses "mmc" entries in /aliases. This difference will be relevant once the Tegra MMC driver is converted to DM, and the MMC core handles alias lookups. To avoid issues during that conversion, fix the Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC core does. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-13 16:45:43 +00:00
mmc0 = "/sdhci@c8000600";
mmc1 = "/sdhci@c8000200";
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
};
memory {
reg = <0x00000000 0x40000000>;
};
tegra: dts: Sync tegra20.dtsi with Linux v4.4 This file has changed quite a bit since it was set up. Sync it back with Linux v4.4. Adjust the users slightly to cope with the changes: - the host1x node is now called host1x@50000000 - we need a clocks node to provide the clk32k_in phandle - active usb nodes need status = "okay" - active i2c nodes need status = "okay" Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-01-30 23:37:52 +00:00
host1x@50000000 {
ARM: tegra: enable LCD panel on Harmony Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-18 15:46:51 +00:00
status = "okay";
dc@54200000 {
status = "okay";
rgb {
status = "okay";
video: tegra: Move to using simple-panel and pwm-backlight We have standard drivers for panels and backlights which can do most of the work for us. Move the tegra20 LCD driver over to use those instead of custom code. This patch includes device tree changes for the nvidia boards. I have only been able to test seaboard. If this patch is applied, these boards will also need to be synced with the kernel, and updated to use display-timings: - colibri - medcom-wide - paz00 - tec Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:20 +00:00
nvidia,panel = <&panel>;
display-timings {
timing@0 {
/* Seaboard has 1366x768 */
clock-frequency = <42430000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <138>;
hfront-porch = <34>;
hsync-len = <136>;
vback-porch = <21>;
vfront-porch = <4>;
vsync-len = <4>;
};
};
ARM: tegra: enable LCD panel on Harmony Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-18 15:46:51 +00:00
};
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
hdmi@54280000 {
status = "okay";
hdmi-supply = <&vdd_5v0_hdmi>;
vdd-supply = <&hdmi_vdd_reg>;
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
GPIO_ACTIVE_HIGH>;
};
};
pinmux@70000014 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
ata {
nvidia,pins = "ata";
nvidia,function = "ide";
};
atb {
nvidia,pins = "atb", "gma", "gme";
nvidia,function = "sdio4";
};
atc {
nvidia,pins = "atc";
nvidia,function = "nand";
};
atd {
nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
"spia", "spib", "spic";
nvidia,function = "gmi";
};
cdev1 {
nvidia,pins = "cdev1";
nvidia,function = "plla_out";
};
cdev2 {
nvidia,pins = "cdev2";
nvidia,function = "pllp_out4";
};
crtp {
nvidia,pins = "crtp";
nvidia,function = "crt";
};
csus {
nvidia,pins = "csus";
nvidia,function = "vi_sensor_clk";
};
dap1 {
nvidia,pins = "dap1";
nvidia,function = "dap1";
};
dap2 {
nvidia,pins = "dap2";
nvidia,function = "dap2";
};
dap3 {
nvidia,pins = "dap3";
nvidia,function = "dap3";
};
dap4 {
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
ddc {
nvidia,pins = "ddc";
nvidia,function = "i2c2";
};
dta {
nvidia,pins = "dta", "dtd";
nvidia,function = "sdio2";
};
dtb {
nvidia,pins = "dtb", "dtc", "dte";
nvidia,function = "rsvd1";
};
dtf {
nvidia,pins = "dtf";
nvidia,function = "i2c3";
};
gmc {
nvidia,pins = "gmc";
nvidia,function = "uartd";
};
gpu7 {
nvidia,pins = "gpu7";
nvidia,function = "rtck";
};
gpv {
nvidia,pins = "gpv", "slxa", "slxk";
nvidia,function = "pcie";
};
hdint {
nvidia,pins = "hdint", "pta";
nvidia,function = "hdmi";
};
i2cp {
nvidia,pins = "i2cp";
nvidia,function = "i2cp";
};
irrx {
nvidia,pins = "irrx", "irtx";
nvidia,function = "uarta";
};
kbca {
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
"kbce", "kbcf";
nvidia,function = "kbc";
};
lcsn {
nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
"ld3", "ld4", "ld5", "ld6", "ld7",
"ld8", "ld9", "ld10", "ld11", "ld12",
"ld13", "ld14", "ld15", "ld16", "ld17",
"ldc", "ldi", "lhp0", "lhp1", "lhp2",
"lhs", "lm0", "lm1", "lpp", "lpw0",
"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
"lsda", "lsdi", "lspi", "lvp0", "lvp1",
"lvs";
nvidia,function = "displaya";
};
owc {
nvidia,pins = "owc", "spdi", "spdo", "uac";
nvidia,function = "rsvd2";
};
pmc {
nvidia,pins = "pmc";
nvidia,function = "pwr_on";
};
rm {
nvidia,pins = "rm";
nvidia,function = "i2c1";
};
sdb {
nvidia,pins = "sdb", "sdc", "sdd";
nvidia,function = "pwm";
};
sdio1 {
nvidia,pins = "sdio1";
nvidia,function = "sdio1";
};
slxc {
nvidia,pins = "slxc", "slxd";
nvidia,function = "spdif";
};
spid {
nvidia,pins = "spid", "spie", "spif";
nvidia,function = "spi1";
};
spig {
nvidia,pins = "spig", "spih";
nvidia,function = "spi2_alt";
};
uaa {
nvidia,pins = "uaa", "uab", "uda";
nvidia,function = "ulpi";
};
uad {
nvidia,pins = "uad";
nvidia,function = "irda";
};
uca {
nvidia,pins = "uca", "ucb";
nvidia,function = "uartc";
};
conf_ata {
nvidia,pins = "ata", "atb", "atc", "atd", "ate",
"cdev1", "cdev2", "dap1", "dtb", "gma",
"gmb", "gmc", "gmd", "gme", "gpu7",
"gpv", "i2cp", "pta", "rm", "slxa",
"slxk", "spia", "spib", "uac";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
conf_ck32 {
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
};
conf_csus {
nvidia,pins = "csus", "spid", "spif";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
conf_crtp {
nvidia,pins = "crtp", "dap2", "dap3", "dap4",
"dtc", "dte", "dtf", "gpu", "sdio1",
"slxc", "slxd", "spdi", "spdo", "spig",
"uda";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
conf_ddc {
nvidia,pins = "ddc", "dta", "dtd", "kbca",
"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
"sdc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
conf_hdint {
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
"lpw1", "lsc1", "lsck", "lsda", "lsdi",
"lvp0", "owc", "sdb";
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
conf_irrx {
nvidia,pins = "irrx", "irtx", "sdd", "spic",
"spie", "spih", "uaa", "uab", "uad",
"uca", "ucb";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
};
conf_lc {
nvidia,pins = "lc", "ls";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
};
conf_ld0 {
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
"ld5", "ld6", "ld7", "ld8", "ld9",
"ld10", "ld11", "ld12", "ld13", "ld14",
"ld15", "ld16", "ld17", "ldi", "lhp0",
"lhp1", "lhp2", "lhs", "lm0", "lpp",
"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
"lvs", "pmc";
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
conf_ld17_0 {
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
"ld23_22";
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
};
};
};
i2s@70002800 {
status = "okay";
ARM: tegra: enable LCD panel on Harmony Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-18 15:46:51 +00:00
};
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
serial@70006300 {
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
status = "okay";
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
clock-frequency = < 216000000 >;
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
pwm: pwm@7000a000 {
status = "okay";
};
i2c@7000c000 {
status = "okay";
clock-frequency = <400000>;
wm8903: wm8903@1a {
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
micdet-cfg = <0>;
micdet-delay = <100>;
gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
};
};
tegra: fdt: sort dts files Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:12:24 +00:00
nand-controller@70008000 {
dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs This new method is much easier and matches the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-06 03:05:41 +00:00
nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
tegra: fdt: sort dts files Sort nodes in dts files according the the following rules: 1) Any nodes that already exist in any /include/d file, in the order they appear in the /include/d file. 2) Any nodes with a reg property, in order of their address. 3) Any nodes without a reg property, alphabetically by node name. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:12:24 +00:00
nvidia,width = <8>;
nvidia,timing = <26 100 20 80 20 10 12 10 70>;
nand@0 {
reg = <0>;
compatible = "hynix,hy27uf4g2b", "nand-flash";
};
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
hdmi_ddc: i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
pmic: tps6586x@34 {
compatible = "ti,tps6586x";
reg = <0x34>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
#gpio-cells = <2>;
gpio-controller;
sys-supply = <&vdd_5v0_reg>;
vin-sm0-supply = <&sys_reg>;
vin-sm1-supply = <&sys_reg>;
vin-sm2-supply = <&sys_reg>;
vinldo01-supply = <&sm2_reg>;
vinldo23-supply = <&sm2_reg>;
vinldo4-supply = <&sm2_reg>;
vinldo678-supply = <&sm2_reg>;
vinldo9-supply = <&sm2_reg>;
regulators {
sys_reg: sys {
regulator-name = "vdd_sys";
regulator-always-on;
};
sm0 {
regulator-name = "vdd_sm0,vdd_core";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
sm1 {
regulator-name = "vdd_sm1,vdd_cpu";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
sm2_reg: sm2 {
regulator-name = "vdd_sm2,vin_ldo*";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
};
pci_clk_reg: ldo0 {
regulator-name = "vdd_ldo0,vddio_pex_clk";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo1 {
regulator-name = "vdd_ldo1,avdd_pll*";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo2 {
regulator-name = "vdd_ldo2,vdd_rtc";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
ldo3 {
regulator-name = "vdd_ldo3,avdd_usb*";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo4 {
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo5 {
regulator-name = "vdd_ldo5,vcore_mmc";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
ldo6 {
regulator-name = "vdd_ldo6,avdd_vdac";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
hdmi_vdd_reg: ldo7 {
regulator-name = "vdd_ldo7,avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
hdmi_pll_reg: ldo8 {
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo9 {
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
regulator-always-on;
};
ldo_rtc {
regulator-name = "vdd_rtc_out,vdd_cell";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
temperature-sensor@4c {
compatible = "adi,adt7461";
reg = <0x4c>;
};
};
kbc@7000e200 {
status = "okay";
nvidia,debounce-delay-ms = <2>;
nvidia,repeat-delay-ms = <160>;
nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
MATRIX_KEY(0x00, 0x03, KEY_S)
MATRIX_KEY(0x00, 0x04, KEY_A)
MATRIX_KEY(0x00, 0x05, KEY_Z)
MATRIX_KEY(0x00, 0x07, KEY_FN)
MATRIX_KEY(0x01, 0x07, KEY_MENU)
MATRIX_KEY(0x02, 0x06, KEY_LEFTALT)
MATRIX_KEY(0x02, 0x07, KEY_RIGHTALT)
MATRIX_KEY(0x03, 0x00, KEY_5)
MATRIX_KEY(0x03, 0x01, KEY_4)
MATRIX_KEY(0x03, 0x02, KEY_R)
MATRIX_KEY(0x03, 0x03, KEY_E)
MATRIX_KEY(0x03, 0x04, KEY_F)
MATRIX_KEY(0x03, 0x05, KEY_D)
MATRIX_KEY(0x03, 0x06, KEY_X)
MATRIX_KEY(0x04, 0x00, KEY_7)
MATRIX_KEY(0x04, 0x01, KEY_6)
MATRIX_KEY(0x04, 0x02, KEY_T)
MATRIX_KEY(0x04, 0x03, KEY_H)
MATRIX_KEY(0x04, 0x04, KEY_G)
MATRIX_KEY(0x04, 0x05, KEY_V)
MATRIX_KEY(0x04, 0x06, KEY_C)
MATRIX_KEY(0x04, 0x07, KEY_SPACE)
MATRIX_KEY(0x05, 0x00, KEY_9)
MATRIX_KEY(0x05, 0x01, KEY_8)
MATRIX_KEY(0x05, 0x02, KEY_U)
MATRIX_KEY(0x05, 0x03, KEY_Y)
MATRIX_KEY(0x05, 0x04, KEY_J)
MATRIX_KEY(0x05, 0x05, KEY_N)
MATRIX_KEY(0x05, 0x06, KEY_B)
MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
MATRIX_KEY(0x06, 0x00, KEY_MINUS)
MATRIX_KEY(0x06, 0x01, KEY_0)
MATRIX_KEY(0x06, 0x02, KEY_O)
MATRIX_KEY(0x06, 0x03, KEY_I)
MATRIX_KEY(0x06, 0x04, KEY_L)
MATRIX_KEY(0x06, 0x05, KEY_K)
MATRIX_KEY(0x06, 0x06, KEY_COMMA)
MATRIX_KEY(0x06, 0x07, KEY_M)
MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
MATRIX_KEY(0x07, 0x03, KEY_ENTER)
MATRIX_KEY(0x07, 0x07, KEY_MENU)
MATRIX_KEY(0x08, 0x04, KEY_LEFTSHIFT)
MATRIX_KEY(0x08, 0x05, KEY_RIGHTSHIFT)
MATRIX_KEY(0x09, 0x05, KEY_LEFTCTRL)
MATRIX_KEY(0x09, 0x07, KEY_RIGHTCTRL)
MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
MATRIX_KEY(0x0B, 0x01, KEY_P)
MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
MATRIX_KEY(0x0B, 0x05, KEY_DOT)
MATRIX_KEY(0x0C, 0x00, KEY_F10)
MATRIX_KEY(0x0C, 0x01, KEY_F9)
MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
MATRIX_KEY(0x0C, 0x03, KEY_3)
MATRIX_KEY(0x0C, 0x04, KEY_2)
MATRIX_KEY(0x0C, 0x05, KEY_UP)
MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
MATRIX_KEY(0x0E, 0x00, KEY_F11)
MATRIX_KEY(0x0E, 0x01, KEY_F12)
MATRIX_KEY(0x0E, 0x02, KEY_F8)
MATRIX_KEY(0x0E, 0x03, KEY_Q)
MATRIX_KEY(0x0E, 0x04, KEY_F4)
MATRIX_KEY(0x0E, 0x05, KEY_F3)
MATRIX_KEY(0x0E, 0x06, KEY_1)
MATRIX_KEY(0x0E, 0x07, KEY_F7)
MATRIX_KEY(0x0F, 0x00, KEY_ESC)
MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
MATRIX_KEY(0x0F, 0x02, KEY_F5)
MATRIX_KEY(0x0F, 0x03, KEY_TAB)
MATRIX_KEY(0x0F, 0x04, KEY_F1)
MATRIX_KEY(0x0F, 0x05, KEY_F2)
MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
MATRIX_KEY(0x0F, 0x07, KEY_F6)
MATRIX_KEY(0x14, 0x00, KEY_KP7)
MATRIX_KEY(0x15, 0x00, KEY_KP9)
MATRIX_KEY(0x15, 0x01, KEY_KP8)
MATRIX_KEY(0x15, 0x02, KEY_KP4)
MATRIX_KEY(0x15, 0x04, KEY_KP1)
MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
MATRIX_KEY(0x16, 0x02, KEY_KP6)
MATRIX_KEY(0x16, 0x03, KEY_KP5)
MATRIX_KEY(0x16, 0x04, KEY_KP3)
MATRIX_KEY(0x16, 0x05, KEY_KP2)
MATRIX_KEY(0x16, 0x07, KEY_KP0)
MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
MATRIX_KEY(0x1D, 0x03, KEY_HOME)
MATRIX_KEY(0x1D, 0x04, KEY_END)
MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
MATRIX_KEY(0x1F, 0x04, KEY_QUESTION)>;
};
pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <1>;
nvidia,cpu-pwr-good-time = <5000>;
nvidia,cpu-pwr-off-time = <5000>;
nvidia,core-pwr-good-time = <3845 3845>;
nvidia,core-pwr-off-time = <3875>;
nvidia,sys-clock-req-active-high;
};
pcie-controller@80003000 {
status = "okay";
avdd-pex-supply = <&pci_vdd_reg>;
vdd-pex-supply = <&pci_vdd_reg>;
avdd-pex-pll-supply = <&pci_vdd_reg>;
avdd-plle-supply = <&pci_vdd_reg>;
vddio-pex-clk-supply = <&pci_clk_reg>;
pci@1,0 {
status = "okay";
};
pci@2,0 {
status = "okay";
};
};
usb@c5000000 {
status = "okay";
};
usb-phy@c5000000 {
status = "okay";
};
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
usb@c5004000 {
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
status = "okay";
ARM: tegra: fix USB ULPI PHY reset signal inversion confusion USB ULPI PHY reset signals are typically active low. Consequently, they should be marked as GPIO_ACTIVE_LOW in device tree, and indeed they are in the Linux kernel DTs, and in DT properties that U-Boot doesn't yet use. However, in DT properties that U-Boot does use, the value has been set to 0 (== GPIO_ACTIVE_HIGH) to work around a bug in U-Boot. This change fixes the DT to correctly represent the HW, and fixes the Tegra USB driver to cope with the fact that dm_gpio_set_value() internally handles any inversions implied by the DT value GPIO_ACTIVE_LOW. Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-09-15 18:19:37 +00:00
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
};
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-21 12:31:29 +00:00
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
usb-phy@c5004000 {
status = "okay";
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
GPIO_ACTIVE_LOW>;
};
tegra: dts: Sync tegra20.dtsi with Linux v4.4 This file has changed quite a bit since it was set up. Sync it back with Linux v4.4. Adjust the users slightly to cope with the changes: - the host1x node is now called host1x@50000000 - we need a clocks node to provide the clk32k_in phandle - active usb nodes need status = "okay" - active i2c nodes need status = "okay" Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-01-30 23:37:52 +00:00
usb@c5008000 {
status = "okay";
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
usb-phy@c5008000 {
status = "okay";
};
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-21 12:31:29 +00:00
sdhci@c8000200 {
status = "okay";
dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs This new method is much easier and matches the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-06 03:05:41 +00:00
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-21 12:31:29 +00:00
bus-width = <4>;
};
sdhci@c8000600 {
status = "okay";
dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs This new method is much easier and matches the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-06 03:05:41 +00:00
cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files Linux dts files were used for those boards that didn't already have sdhci info populated. Tamonten has their own dtsi file with common sdhci nodes (sourced from Linux). Signed-off-by: Tom Warren <twarren@nvidia.com> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-21 12:31:29 +00:00
bus-width = <8>;
};
ARM: tegra: enable LCD panel on Harmony Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-18 15:46:51 +00:00
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
backlight: backlight {
compatible = "pwm-backlight";
enable-gpios = <&gpio TEGRA_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
power-supply = <&vdd_bl_reg>;
pwms = <&pwm 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
tegra: dts: Sync tegra20.dtsi with Linux v4.4 This file has changed quite a bit since it was set up. Sync it back with Linux v4.4. Adjust the users slightly to cope with the changes: - the host1x node is now called host1x@50000000 - we need a clocks node to provide the clk32k_in phandle - active usb nodes need status = "okay" - active i2c nodes need status = "okay" Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-01-30 23:37:52 +00:00
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
gpio-keys {
compatible = "gpio-keys";
power {
label = "Power";
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
};
tegra: video: Move LCD driver to use the DM PWM driver Use the driver-model PWM driver in preference to the old code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-01-30 23:38:01 +00:00
};
video: tegra: Move to using simple-panel and pwm-backlight We have standard drivers for panels and backlights which can do most of the work for us. Move the tegra20 LCD driver over to use those instead of custom code. This patch includes device tree changes for the nvidia boards. I have only been able to test seaboard. If this patch is applied, these boards will also need to be synced with the kernel, and updated to use display-timings: - colibri - medcom-wide - paz00 - tec Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:20 +00:00
panel: panel {
compatible = "auo,b101aw03", "simple-panel";
power-supply = <&vdd_pnl_reg>;
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
backlight = <&backlight>;
ARM: tegra: enable LCD panel on Harmony Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-06-18 15:46:51 +00:00
};
tegra: dts: Sync tegra20 device tree files with Linux Sync everything except the display panel, which will come in a future patch. One USB port is left disabled since we don't want to support it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-05-08 22:55:19 +00:00
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vdd_5v0_reg: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "vdd_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_1v5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
};
regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "vdd_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
pci_vdd_reg: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "vdd_1v05";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
gpio = <&pmic 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_pnl_reg: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_bl_reg: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vdd_5v0_hdmi: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
regulator-name = "VDDIO_HDMI";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio TEGRA_GPIO(T, 2) GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vdd_5v0_reg>;
};
};
sound {
compatible = "nvidia,tegra-audio-wm8903-harmony",
"nvidia,tegra-audio-wm8903";
nvidia,model = "NVIDIA Tegra Harmony";
nvidia,audio-routing =
"Headphone Jack", "HPOUTR",
"Headphone Jack", "HPOUTL",
"Int Spk", "ROP",
"Int Spk", "RON",
"Int Spk", "LOP",
"Int Spk", "LON",
"Mic Jack", "MICBIAS",
"IN1L", "Mic Jack";
nvidia,i2s-controller = <&tegra_i2s1>;
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
GPIO_ACTIVE_HIGH>;
nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
GPIO_ACTIVE_HIGH>;
nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
GPIO_ACTIVE_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
<&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
tegra: harmony: add device tree support ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-21 10:04:27 +00:00
};
tegra: fdt: Ensure that the console UART is enabled Many tegra boards have the console UART node disabled. With livetree this prevents serial from working since it does not 'force' the console to be bound. Updates the affected boards to fix this error. The boards were checked with: for b in $(grep tegra boards.cfg |grep -v integrator | \ awk '{print $7}' | sort); do echo $b; fdtgrep -c nvidia,tegra20-uart b/$b/u-boot.dtb |grep okay; done Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
2017-06-12 12:22:01 +00:00
&uartd {
status = "okay";
};
Reference in a new issue Copy permalink