u-boot/arch/arm/dts/armada-xp-crs328-4c-20s-4s.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for CRS328-4C-20S-4S+ board
 *
 * Copyright (C) 2016 Allied Telesis Labs
 * Copyright (C) 2020 Sartura Ltd.
 *
 * Based on armada-xp-db.dts
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the default
 * 0xd0000000). The 0xf1000000 is the default used by the recent,
 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
 * boards were delivered with an older version of the bootloader that
 * left internal registers mapped at 0xd0000000. If you are in this
 * situation, you should either update your bootloader (preferred
 * solution) or the below Device Tree should be adjusted.
 */

/dts-v1/;
#include "armada-xp-98dx3236.dtsi"
#include "armada-xp-crs328-4c-20s-4s-u-boot.dtsi"

/ {
	model = "CRS328-4C-20S-4S+";
	compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs = "console=ttyS0,115200 earlyprintk";
	};

	aliases {
		spi0 = &spi0;
	};

	memory {
		device_type = "memory";
		reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
	};
};

&L2 {
	arm,parity-enable;
	marvell,ecc-enable;
};

&devbus_bootcs {
	status = "okay";

	/* Device Bus parameters are required */

	/* Read parameters */
	devbus,bus-width    = <16>;
	devbus,turn-off-ps  = <60000>;
	devbus,badr-skew-ps = <0>;
	devbus,acc-first-ps = <124000>;
	devbus,acc-next-ps  = <248000>;
	devbus,rd-setup-ps  = <0>;
	devbus,rd-hold-ps   = <0>;

	/* Write parameters */
	devbus,sync-enable = <0>;
	devbus,wr-high-ps  = <60000>;
	devbus,wr-low-ps   = <60000>;
	devbus,ale-wr-ps   = <60000>;
};

&uart0 {
	status = "okay";
};

&uart1 {
	status = "okay";
};

&i2c0 {
	clock-frequency = <100000>;
	status = "okay";
};

&usb0 {
	status = "okay";
};

&spi0 {
	status = "okay";

	spi-flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-flash", "jedec,spi-nor";
		reg = <0>; /* Chip select 0 */
		spi-max-frequency = <108000000>;
		m25p,fast-read;

		partition@u-boot {
			reg = <0x00000000 0x001f0000>;
			label = "u-boot";
		};
		partition@u-boot-env {
			reg = <0x001f0000 0x00010000>;
			label = "u-boot-env";
		};
		partition@ubi1 {
			reg = <0x00200000 0x00e00000>;
			label = "ubi1";
		};
	};
};