u-boot/arch/mips/mach-mscc/Makefile

# SPDX-License-Identifier: (GPL-2.0+ OR MIT)

CFLAGS_cpu.o += -finline-limit=64000

obj-y += cpu.o dram.o reset.o phy.o lowlevel_init.o
obj-$(CONFIG_SOC_LUTON) += lowlevel_init_luton.o
MSCC: add support for Ocelot SoCs This family of SoCs are found in the Microsemi Switches solution and have already a support in the linux kernel. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 2018-12-14 15:16:47 +00:00			`# SPDX-License-Identifier: (GPL-2.0+ OR MIT)`

			`CFLAGS_cpu.o += -finline-limit=64000`

mips: mscc: Add generic PHY MIIM utility functions The PHY MIIM utility functions can/will be used for board detection purposes. Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com> 2018-12-20 08:56:02 +00:00			`obj-y += cpu.o dram.o reset.o phy.o lowlevel_init.o`
MSCC: add support for Luton SoCs As the Ocelots SoCs, this family of SoCs are found in the Microsemi Switches solution. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> 2018-12-14 15:16:48 +00:00			`obj-$(CONFIG_SOC_LUTON) += lowlevel_init_luton.o`